STC8xxxx.h 148 KB

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  1. /*---------------------------------------------------------------------*/
  2. /* --- STC MCU Limited ------------------------------------------------*/
  3. /* --- STC 1T Series MCU Demo Programme -------------------------------*/
  4. /* --- Mobile: (86)13922805190 ----------------------------------------*/
  5. /* --- Fax: 86-0513-55012956,55012947,55012969 ------------------------*/
  6. /* --- Tel: 86-0513-55012928,55012929,55012966 ------------------------*/
  7. /* --- Web: www.STCMCU.com --------------------------------------------*/
  8. /* --- Web: www.STCMCUDATA.com ---------------------------------------*/
  9. /* --- QQ: 800003751 -------------------------------------------------*/
  10. /* 如果要在程序中使用此代码,请在程序中注明使用了STC的资料及程序 */
  11. /*---------------------------------------------------------------------*/
  12. #ifndef _STC8xxxx_H
  13. #define _STC8xxxx_H
  14. #include <intrins.h>
  15. /* BYTE Registers */
  16. sfr P0 = 0x80;
  17. sfr SP = 0x81;
  18. sfr DPL = 0x82;
  19. sfr DPH = 0x83;
  20. sfr S4CON = 0x84;
  21. sfr S4BUF = 0x85;
  22. sfr PCON = 0x87;
  23. sfr TCON = 0x88;
  24. sfr TMOD = 0x89;
  25. sfr TL0 = 0x8A;
  26. sfr TL1 = 0x8B;
  27. sfr TH0 = 0x8C;
  28. sfr TH1 = 0x8D;
  29. sfr AUXR = 0x8E;
  30. sfr WAKE_CLKO = 0x8F;
  31. sfr INT_CLKO = 0x8F;
  32. sfr P1 = 0x90;
  33. sfr P1M1 = 0x91; //P1M1.n,P1M0.n =00--->Standard, 01--->push-pull 实际上1T的都一样
  34. sfr P1M0 = 0x92; // =10--->pure input, 11--->open drain
  35. sfr P0M1 = 0x93; //P0M1.n,P0M0.n =00--->Standard, 01--->push-pull
  36. sfr P0M0 = 0x94; // =10--->pure input, 11--->open drain
  37. sfr P2M1 = 0x95; //P2M1.n,P2M0.n =00--->Standard, 01--->push-pull
  38. sfr P2M0 = 0x96; // =10--->pure input, 11--->open drain
  39. //sfr PCON2 = 0x97;
  40. //sfr AUXR2 = 0x97;
  41. sfr SCON = 0x98;
  42. sfr SBUF = 0x99;
  43. sfr S2CON = 0x9A; //
  44. sfr S2BUF = 0x9B; //
  45. sfr P2 = 0xA0;
  46. sfr BUS_SPEED = 0xA1;
  47. sfr P_SW1 = 0xA2;
  48. sfr IE = 0xA8;
  49. sfr SADDR = 0xA9;
  50. sfr WKTCL = 0xAA; //唤醒定时器低字节
  51. sfr WKTCH = 0xAB; //唤醒定时器高字节
  52. sfr S3CON = 0xAC;
  53. sfr S3BUF = 0xAD;
  54. sfr TA = 0xAE;
  55. sfr IE2 = 0xAF;
  56. sfr P3 = 0xB0;
  57. sfr P3M1 = 0xB1; //P3M1.n,P3M0.n =00--->Standard, 01--->push-pull
  58. sfr P3M0 = 0xB2; // =10--->pure input, 11--->open drain
  59. sfr P4M1 = 0xB3; //P4M1.n,P4M0.n =00--->Standard, 01--->push-pull
  60. sfr P4M0 = 0xB4; // =10--->pure input, 11--->open drain
  61. sfr IP2 = 0xB5;
  62. sfr IP2H = 0xB6;
  63. sfr IPH = 0xB7;
  64. sfr IP = 0xB8;
  65. sfr SADEN = 0xB9;
  66. sfr P_SW2 = 0xBA;
  67. sfr VOCTRL = 0xBB;
  68. sfr ADC_CONTR = 0xBC; //ADC控制寄存器
  69. sfr ADC_RES = 0xBD; //ADC结果高字节
  70. sfr ADC_RESL = 0xBE; //ADC结果低字节
  71. sfr P4 = 0xC0;
  72. sfr WDT_CONTR = 0xC1;
  73. sfr IAP_DATA = 0xC2;
  74. sfr IAP_ADDRH = 0xC3;
  75. sfr IAP_ADDRL = 0xC4;
  76. sfr IAP_CMD = 0xC5;
  77. sfr IAP_TRIG = 0xC6;
  78. sfr IAP_CONTR = 0xC7;
  79. sfr ISP_DATA = 0xC2;
  80. sfr ISP_ADDRH = 0xC3;
  81. sfr ISP_ADDRL = 0xC4;
  82. sfr ISP_CMD = 0xC5;
  83. sfr ISP_TRIG = 0xC6;
  84. sfr ISP_CONTR = 0xC7;
  85. sfr P5 = 0xC8; //
  86. sfr P5M1 = 0xC9; // P5M1.n,P5M0.n =00--->Standard, 01--->push-pull
  87. sfr P5M0 = 0xCA; // =10--->pure input, 11--->open drain
  88. sfr P6M1 = 0xCB; // P5M1.n,P5M0.n =00--->Standard, 01--->push-pull
  89. sfr P6M0 = 0xCC; // =10--->pure input, 11--->open drain
  90. sfr SPSTAT = 0xCD; //
  91. sfr SPCTL = 0xCE; //
  92. sfr SPDAT = 0xCF; //
  93. sfr PSW = 0xD0;
  94. sfr T4T3M = 0xD1;
  95. sfr T4H = 0xD2;
  96. sfr T4L = 0xD3;
  97. sfr T3H = 0xD4;
  98. sfr T3L = 0xD5;
  99. sfr T2H = 0xD6;
  100. sfr T2L = 0xD7;
  101. sfr TH4 = 0xD2;
  102. sfr TL4 = 0xD3;
  103. sfr TH3 = 0xD4;
  104. sfr TL3 = 0xD5;
  105. sfr TH2 = 0xD6;
  106. sfr TL2 = 0xD7;
  107. sfr CCON = 0xD8; //
  108. sfr CMOD = 0xD9; //
  109. sfr CCAPM0 = 0xDA; //PCA模块0的工作模式寄存器。
  110. sfr CCAPM1 = 0xDB; //PCA模块1的工作模式寄存器。
  111. sfr CCAPM2 = 0xDC; //PCA模块2的工作模式寄存器。
  112. //sfr CCAPM3 = 0xDD; //PCA模块3的工作模式寄存器。
  113. sfr USBCLK = 0xDC;
  114. sfr ADCCFG = 0xDE; //
  115. sfr IP3 = 0xDF; //中断优先级寄存器
  116. sfr ACC = 0xE0;
  117. sfr P7M1 = 0xE1;
  118. sfr P7M0 = 0xE2;
  119. sfr DPS = 0xE3;
  120. sfr DPL1 = 0xE4;
  121. sfr DPH1 = 0xE5;
  122. sfr CMPCR1 = 0xE6;
  123. sfr CMPCR2 = 0xE7;
  124. sfr P6 = 0xE8;
  125. sfr CL = 0xE9; //
  126. sfr CCAP0L = 0xEA; //PCA模块0的捕捉/比较寄存器低8位。
  127. sfr CCAP1L = 0xEB; //PCA模块1的捕捉/比较寄存器低8位。
  128. sfr CCAP2L = 0xEC; //PCA模块2的捕捉/比较寄存器低8位。
  129. //sfr CCAP3L = 0xED; //PCA模块3的捕捉/比较寄存器低8位。
  130. sfr USBDAT = 0xEC;
  131. sfr IP3H = 0xEE;
  132. sfr AUXINTIF = 0xEF; //辅助中断标志 B6-INT4IF, B5-INT3IF, B4-INT2IF, B2-T4IF, B1-T3IF, B0-T2IF
  133. sfr B = 0xF0;
  134. sfr PWMSET = 0xF1; //增强型PWM全局配置寄存器
  135. sfr PCA_PWM0 = 0xF2; //PCA模块0 PWM寄存器。
  136. sfr PCA_PWM1 = 0xF3; //PCA模块1 PWM寄存器。
  137. sfr PCA_PWM2 = 0xF4; //PCA模块2 PWM寄存器。
  138. //sfr PCA_PWM3 = 0xF5; //PCA模块3 PWM寄存器。
  139. sfr PWMCFG01 = 0xF6; //增强型PWM配置寄存器
  140. sfr PWMCFG23 = 0xF7; //增强型PWM配置寄存器
  141. sfr USBCON = 0xF4;
  142. sfr IAP_TPS = 0xF5;
  143. sfr P7 = 0xF8;
  144. sfr CH = 0xF9;
  145. sfr CCAP0H = 0xFA; //PCA模块0的捕捉/比较寄存器高8位。
  146. sfr CCAP1H = 0xFB; //PCA模块1的捕捉/比较寄存器高8位。
  147. sfr CCAP2H = 0xFC; //PCA模块2的捕捉/比较寄存器高8位。
  148. //sfr CCAP3H = 0xFD; //PCA模块3的捕捉/比较寄存器高8位。
  149. sfr PWMCFG45 = 0xFE; //增强型PWM配置寄存器
  150. sfr USBADR = 0xFC;
  151. sfr RSTCFG = 0xFF; //
  152. // 7 6 5 4 3 2 1 0 Reset Value
  153. //INT_CLKO: 中断与时钟输出控制寄存器 - EX4 EX3 EX2 - T2CLKO T1CLKO T0CLKO 0000,0000
  154. #define INT4_Enable() INT_CLKO |= (1 << 6)
  155. #define INT3_Enable() INT_CLKO |= (1 << 5)
  156. #define INT2_Enable() INT_CLKO |= (1 << 4)
  157. #define INT1_Enable() EX1 = 1
  158. #define INT0_Enable() EX0 = 1
  159. #define INT4_Disable() INT_CLKO &= ~(1 << 6)
  160. #define INT3_Disable() INT_CLKO &= ~(1 << 5)
  161. #define INT2_Disable() INT_CLKO &= ~(1 << 4)
  162. #define INT1_Disable() EX1 = 0
  163. #define INT0_Disable() EX0 = 0
  164. // 7 6 5 4 3 2 1 0 Reset Value
  165. //AUXINTIF: 辅助中断标志寄存器 - INT4IF INT3IF INT2IF - T4IF T3IF T2IF 0000,0000
  166. #define INT4IF 0x40
  167. #define INT3IF 0x20
  168. #define INT2IF 0x10
  169. #define T4IF 0x04
  170. #define T3IF 0x02
  171. #define T2IF 0x01
  172. #define INT4_Clear() AUXINTIF &= ~INT4IF /* 清除外中断4标志位 */
  173. #define INT3_Clear() AUXINTIF &= ~INT3IF /* 清除外中断3标志位 */
  174. #define INT2_Clear() AUXINTIF &= ~INT2IF /* 清除外中断2标志位 */
  175. #define INT1_Clear() IE1 = 0 /* 清除外中断1标志位 */
  176. #define INT0_Clear() IE0 = 0 /* 清除外中断0标志位 */
  177. #define INT0_Fall() IT0 = 1 /* INT0 下降沿中断 */
  178. #define INT0_RiseFall() IT0 = 0 /* INT0 下降沿上升沿均中断 */
  179. #define INT1_Fall() IT1 = 1 /* INT1 下降沿中断 */
  180. #define INT1_RiseFall() IT0 = 0 /* INT1 下降沿上升沿均中断 */
  181. //===============================================================
  182. #define EAXSFR() P_SW2 |= 0x80 /* MOVX A,@DPTR/MOVX @DPTR,A指令的操作对象为扩展SFR(XSFR) */
  183. #define EAXRAM() P_SW2 &= ~0x80 /* MOVX A,@DPTR/MOVX @DPTR,A指令的操作对象为扩展RAM(XRAM) */
  184. #define I2C_USE_P14P15() P_SW2 &= ~0x30 /* 将I2C切换到P1.4(SDA) P1.5(SCL)(上电默认).*/
  185. #define I2C_USE_P24P25() P_SW2 = (P_SW2 & ~0x30) | 0x10 /* 将I2C切换到P2.4(SDA) P2.5(SCL).*/
  186. #define I2C_USE_P76P77() P_SW2 = (P_SW2 & ~0x30) | 0x20 /* 将I2C切换到P7.6(SDA) P7.7(SCL).*/
  187. #define I2C_USE_P33P32() P_SW2 |= 0x30 /* 将I2C切换到P3.3(SDA) P3.2(SCL).*/
  188. #define CLKSEL (*(unsigned char volatile xdata *)0xfe00)
  189. #define CKSEL (*(unsigned char volatile xdata *)0xfe00) /* 主时钟源选择 */
  190. #define CLKDIV (*(unsigned char volatile xdata *)0xfe01) /* 主时钟分频 */
  191. #define IRC24MCR (*(unsigned char volatile xdata *)0xfe02) /* IRC 24MHZ控制 */
  192. #define XOSCCR (*(unsigned char volatile xdata *)0xfe03) /* XOSC控制 */
  193. #define IRC32KCR (*(unsigned char volatile xdata *)0xfe04) /* IRC 32KHZ控制 */
  194. #define MCLKOCR (*(unsigned char volatile xdata *)0xfe05)
  195. #define IRCDB (*(unsigned char volatile xdata *)0xfe06)
  196. #define X32KCR (*(unsigned char volatile xdata *)0xfe08)
  197. #define MainFosc_IRC24M() CKSEL = (CKSEL & ~0x03) /* 选择内部24MHZ时钟 */
  198. #define MainFosc_XTAL() CKSEL = (CKSEL & ~0x03) | 0x01 /* 选择外部晶振或时钟 */
  199. #define MainFosc_IRC32K() CKSEL = CKSEL | 0x03 /* 选择内部32K时钟 */
  200. #define EXT_CLOCK() XOSCCR = 0x80 /* 选择外部时钟 */
  201. #define EXT_CRYSTAL() XOSCCR = 0xC0 /* 选择外部晶振 */
  202. #define P0PU (*(unsigned char volatile xdata *)0xfe10) /* P0 4.1K Pull Up Enable */
  203. #define P1PU (*(unsigned char volatile xdata *)0xfe11) /* P1 4.1K Pull Up Enable */
  204. #define P2PU (*(unsigned char volatile xdata *)0xfe12) /* P2 4.1K Pull Up Enable */
  205. #define P3PU (*(unsigned char volatile xdata *)0xfe13) /* P3 4.1K Pull Up Enable */
  206. #define P4PU (*(unsigned char volatile xdata *)0xfe14) /* P4 4.1K Pull Up Enable */
  207. #define P5PU (*(unsigned char volatile xdata *)0xfe15) /* P5 4.1K Pull Up Enable */
  208. #define P6PU (*(unsigned char volatile xdata *)0xfe16) /* P6 4.1K Pull Up Enable */
  209. #define P7PU (*(unsigned char volatile xdata *)0xfe17) /* P7 4.1K Pull Up Enable */
  210. #define P0NCS (*(unsigned char volatile xdata *)0xfe18) /* P0 Non Schmit Trigger 0: 使能端口施密特触发功能(默认), 1: 禁止 */
  211. #define P1NCS (*(unsigned char volatile xdata *)0xfe19) /* P1 Non Schmit Trigger */
  212. #define P2NCS (*(unsigned char volatile xdata *)0xfe1a) /* P2 Non Schmit Trigger */
  213. #define P3NCS (*(unsigned char volatile xdata *)0xfe1b) /* P3 Non Schmit Trigger */
  214. #define P4NCS (*(unsigned char volatile xdata *)0xfe1c) /* P4 Non Schmit Trigger */
  215. #define P5NCS (*(unsigned char volatile xdata *)0xfe1d) /* P5 Non Schmit Trigger */
  216. #define P6NCS (*(unsigned char volatile xdata *)0xfe1e) /* P6 Non Schmit Trigger */
  217. #define P7NCS (*(unsigned char volatile xdata *)0xfe1f) /* P7 Non Schmit Trigger */
  218. #define P0SR (*(unsigned char volatile xdata *)0xfe20) /* 端口电平转换速度 0: 快, 1: 慢(默认) */
  219. #define P1SR (*(unsigned char volatile xdata *)0xfe21)
  220. #define P2SR (*(unsigned char volatile xdata *)0xfe22)
  221. #define P3SR (*(unsigned char volatile xdata *)0xfe23)
  222. #define P4SR (*(unsigned char volatile xdata *)0xfe24)
  223. #define P5SR (*(unsigned char volatile xdata *)0xfe25)
  224. #define P6SR (*(unsigned char volatile xdata *)0xfe26)
  225. #define P7SR (*(unsigned char volatile xdata *)0xfe27)
  226. #define P0DR (*(unsigned char volatile xdata *)0xfe28) /* 端口驱动电流控制 0: 增强驱动能力, 1: 一般驱动能力(默认) */
  227. #define P1DR (*(unsigned char volatile xdata *)0xfe29)
  228. #define P2DR (*(unsigned char volatile xdata *)0xfe2a)
  229. #define P3DR (*(unsigned char volatile xdata *)0xfe2b)
  230. #define P4DR (*(unsigned char volatile xdata *)0xfe2c)
  231. #define P5DR (*(unsigned char volatile xdata *)0xfe2d)
  232. #define P6DR (*(unsigned char volatile xdata *)0xfe2e)
  233. #define P7DR (*(unsigned char volatile xdata *)0xfe2f)
  234. #define P0IE (*(unsigned char volatile xdata *)0xfe30)/* 端口数字信号输入使能 0: 禁止数字信号输入, 1: 使能数字信号输入(默认) */
  235. #define P1IE (*(unsigned char volatile xdata *)0xfe31)
  236. #define P2IE (*(unsigned char volatile xdata *)0xfe32)
  237. #define P3IE (*(unsigned char volatile xdata *)0xfe33)
  238. #define P4IE (*(unsigned char volatile xdata *)0xfe34)
  239. #define P5IE (*(unsigned char volatile xdata *)0xfe35)
  240. #define P6IE (*(unsigned char volatile xdata *)0xfe36)
  241. #define P7IE (*(unsigned char volatile xdata *)0xfe37)
  242. #define I2CCFG (*(unsigned char volatile xdata *)0xfe80) /* */
  243. #define I2CMSCR (*(unsigned char volatile xdata *)0xfe81) /* */
  244. #define I2CMSST (*(unsigned char volatile xdata *)0xfe82) /* */
  245. #define I2CSLCR (*(unsigned char volatile xdata *)0xfe83) /* */
  246. #define I2CSLST (*(unsigned char volatile xdata *)0xfe84) /* */
  247. #define I2CSLADR (*(unsigned char volatile xdata *)0xfe85) /* */
  248. #define I2CTXD (*(unsigned char volatile xdata *)0xfe86) /* */
  249. #define I2CRXD (*(unsigned char volatile xdata *)0xfe87) /* */
  250. #define I2CMSAUX (*(unsigned char volatile xdata *)0xfe88)
  251. #define TM2PS (*(unsigned char volatile xdata *)0xfea2)
  252. #define TM3PS (*(unsigned char volatile xdata *)0xfea3)
  253. #define TM4PS (*(unsigned char volatile xdata *)0xfea4)
  254. #define ADCTIM (*(unsigned char volatile xdata *)0xfea8)
  255. #define T3T4PIN (*(unsigned char volatile xdata *)0xfeac)
  256. #define PWMA_ETRPS (*(unsigned char volatile xdata *)0xfeb0)
  257. #define PWMA_ENO (*(unsigned char volatile xdata *)0xfeb1)
  258. #define PWMA_PS (*(unsigned char volatile xdata *)0xfeb2)
  259. #define PWMA_IOAUX (*(unsigned char volatile xdata *)0xfeb3)
  260. #define PWMB_ETRPS (*(unsigned char volatile xdata *)0xfeb4)
  261. #define PWMB_ENO (*(unsigned char volatile xdata *)0xfeb5)
  262. #define PWMB_PS (*(unsigned char volatile xdata *)0xfeb6)
  263. #define PWMB_IOAUX (*(unsigned char volatile xdata *)0xfeb7)
  264. #define PWMA_CR1 (*(unsigned char volatile xdata *)0xfec0)
  265. #define PWMA_CR2 (*(unsigned char volatile xdata *)0xfec1)
  266. #define PWMA_SMCR (*(unsigned char volatile xdata *)0xfec2)
  267. #define PWMA_ETR (*(unsigned char volatile xdata *)0xfec3)
  268. #define PWMA_IER (*(unsigned char volatile xdata *)0xfec4)
  269. #define PWMA_SR1 (*(unsigned char volatile xdata *)0xfec5)
  270. #define PWMA_SR2 (*(unsigned char volatile xdata *)0xfec6)
  271. #define PWMA_EGR (*(unsigned char volatile xdata *)0xfec7)
  272. #define PWMA_CCMR1 (*(unsigned char volatile xdata *)0xfec8)
  273. #define PWMA_CCMR2 (*(unsigned char volatile xdata *)0xfec9)
  274. #define PWMA_CCMR3 (*(unsigned char volatile xdata *)0xfeca)
  275. #define PWMA_CCMR4 (*(unsigned char volatile xdata *)0xfecb)
  276. #define PWMA_CCER1 (*(unsigned char volatile xdata *)0xfecc)
  277. #define PWMA_CCER2 (*(unsigned char volatile xdata *)0xfecd)
  278. #define PWMA_CNTR (*(unsigned int volatile xdata *)0xfece)
  279. #define PWMA_CNTRH (*(unsigned char volatile xdata *)0xfece)
  280. #define PWMA_CNTRL (*(unsigned char volatile xdata *)0xfecf)
  281. #define PWMA_PSCR (*(unsigned int volatile xdata *)0xfed0)
  282. #define PWMA_PSCRH (*(unsigned char volatile xdata *)0xfed0)
  283. #define PWMA_PSCRL (*(unsigned char volatile xdata *)0xfed1)
  284. #define PWMA_ARR (*(unsigned int volatile xdata *)0xfed2)
  285. #define PWMA_ARRH (*(unsigned char volatile xdata *)0xfed2)
  286. #define PWMA_ARRL (*(unsigned char volatile xdata *)0xfed3)
  287. #define PWMA_RCR (*(unsigned char volatile xdata *)0xfed4)
  288. #define PWMA_CCR1 (*(unsigned int volatile xdata *)0xfed5)
  289. #define PWMA_CCR1H (*(unsigned char volatile xdata *)0xfed5)
  290. #define PWMA_CCR1L (*(unsigned char volatile xdata *)0xfed6)
  291. #define PWMA_CCR2 (*(unsigned int volatile xdata *)0xfed7)
  292. #define PWMA_CCR2H (*(unsigned char volatile xdata *)0xfed7)
  293. #define PWMA_CCR2L (*(unsigned char volatile xdata *)0xfed8)
  294. #define PWMA_CCR3 (*(unsigned int volatile xdata *)0xfed9)
  295. #define PWMA_CCR3H (*(unsigned char volatile xdata *)0xfed9)
  296. #define PWMA_CCR3L (*(unsigned char volatile xdata *)0xfeda)
  297. #define PWMA_CCR4 (*(unsigned int volatile xdata *)0xfedb)
  298. #define PWMA_CCR4H (*(unsigned char volatile xdata *)0xfedb)
  299. #define PWMA_CCR4L (*(unsigned char volatile xdata *)0xfedc)
  300. #define PWMA_BRK (*(unsigned char volatile xdata *)0xfedd)
  301. #define PWMA_DTR (*(unsigned char volatile xdata *)0xfede)
  302. #define PWMA_OISR (*(unsigned char volatile xdata *)0xfedf)
  303. #define PWMB_CR1 (*(unsigned char volatile xdata *)0xfee0)
  304. #define PWMB_CR2 (*(unsigned char volatile xdata *)0xfee1)
  305. #define PWMB_SMCR (*(unsigned char volatile xdata *)0xfee2)
  306. #define PWMB_ETR (*(unsigned char volatile xdata *)0xfee3)
  307. #define PWMB_IER (*(unsigned char volatile xdata *)0xfee4)
  308. #define PWMB_SR1 (*(unsigned char volatile xdata *)0xfee5)
  309. #define PWMB_SR2 (*(unsigned char volatile xdata *)0xfee6)
  310. #define PWMB_EGR (*(unsigned char volatile xdata *)0xfee7)
  311. #define PWMB_CCMR1 (*(unsigned char volatile xdata *)0xfee8)
  312. #define PWMB_CCMR2 (*(unsigned char volatile xdata *)0xfee9)
  313. #define PWMB_CCMR3 (*(unsigned char volatile xdata *)0xfeea)
  314. #define PWMB_CCMR4 (*(unsigned char volatile xdata *)0xfeeb)
  315. #define PWMB_CCER1 (*(unsigned char volatile xdata *)0xfeec)
  316. #define PWMB_CCER2 (*(unsigned char volatile xdata *)0xfeed)
  317. #define PWMB_CNTR (*(unsigned int volatile xdata *)0xfeee)
  318. #define PWMB_CNTRH (*(unsigned char volatile xdata *)0xfeee)
  319. #define PWMB_CNTRL (*(unsigned char volatile xdata *)0xfeef)
  320. #define PWMB_PSCR (*(unsigned int volatile xdata *)0xfef0)
  321. #define PWMB_PSCRH (*(unsigned char volatile xdata *)0xfef0)
  322. #define PWMB_PSCRL (*(unsigned char volatile xdata *)0xfef1)
  323. #define PWMB_ARR (*(unsigned int volatile xdata *)0xfef2)
  324. #define PWMB_ARRH (*(unsigned char volatile xdata *)0xfef2)
  325. #define PWMB_ARRL (*(unsigned char volatile xdata *)0xfef3)
  326. #define PWMB_RCR (*(unsigned char volatile xdata *)0xfef4)
  327. #define PWMB_CCR5 (*(unsigned int volatile xdata *)0xfef5)
  328. #define PWMB_CCR5H (*(unsigned char volatile xdata *)0xfef5)
  329. #define PWMB_CCR5L (*(unsigned char volatile xdata *)0xfef6)
  330. #define PWMB_CCR6 (*(unsigned int volatile xdata *)0xfef7)
  331. #define PWMB_CCR6H (*(unsigned char volatile xdata *)0xfef7)
  332. #define PWMB_CCR6L (*(unsigned char volatile xdata *)0xfef8)
  333. #define PWMB_CCR7 (*(unsigned int volatile xdata *)0xfef9)
  334. #define PWMB_CCR7H (*(unsigned char volatile xdata *)0xfef9)
  335. #define PWMB_CCR7L (*(unsigned char volatile xdata *)0xfefa)
  336. #define PWMB_CCR8 (*(unsigned int volatile xdata *)0xfefb)
  337. #define PWMB_CCR8H (*(unsigned char volatile xdata *)0xfefb)
  338. #define PWMB_CCR8L (*(unsigned char volatile xdata *)0xfefc)
  339. #define PWMB_BRK (*(unsigned char volatile xdata *)0xfefd)
  340. #define PWMB_DTR (*(unsigned char volatile xdata *)0xfefe)
  341. #define PWMB_OISR (*(unsigned char volatile xdata *)0xfeff)
  342. /////////////////////////////////////////////////
  343. //FD00H-FDFFH
  344. /////////////////////////////////////////////////
  345. #define PWM0C (*(unsigned int volatile xdata *)0xff00)
  346. #define PWM0CH (*(unsigned char volatile xdata *)0xff00)
  347. #define PWM0CL (*(unsigned char volatile xdata *)0xff01)
  348. #define PWM0CKS (*(unsigned char volatile xdata *)0xff02)
  349. #define PWM0TADC (*(unsigned int volatile xdata *)0xff03)
  350. #define PWM0TADCH (*(unsigned char volatile xdata *)0xff03)
  351. #define PWM0TADCL (*(unsigned char volatile xdata *)0xff04)
  352. #define PWM0IF (*(unsigned char volatile xdata *)0xff05)
  353. #define PWM0FDCR (*(unsigned char volatile xdata *)0xff06)
  354. #define PWM00T1 (*(unsigned int volatile xdata *)0xff10)
  355. #define PWM00T1H (*(unsigned char volatile xdata *)0xff10)
  356. #define PWM00T1L (*(unsigned char volatile xdata *)0xff11)
  357. #define PWM00T2 (*(unsigned int volatile xdata *)0xff12)
  358. #define PWM00T2H (*(unsigned char volatile xdata *)0xff12)
  359. #define PWM00T2L (*(unsigned char volatile xdata *)0xff13)
  360. #define PWM00CR (*(unsigned char volatile xdata *)0xff14)
  361. #define PWM00HLD (*(unsigned char volatile xdata *)0xff15)
  362. #define PWM01T1 (*(unsigned int volatile xdata *)0xff18)
  363. #define PWM01T1H (*(unsigned char volatile xdata *)0xff18)
  364. #define PWM01T1L (*(unsigned char volatile xdata *)0xff19)
  365. #define PWM01T2 (*(unsigned int volatile xdata *)0xff1a)
  366. #define PWM01T2H (*(unsigned char volatile xdata *)0xff1a)
  367. #define PWM01T2L (*(unsigned char volatile xdata *)0xff1b)
  368. #define PWM01CR (*(unsigned char volatile xdata *)0xff1c)
  369. #define PWM01HLD (*(unsigned char volatile xdata *)0xff1d)
  370. #define PWM02T1 (*(unsigned int volatile xdata *)0xff20)
  371. #define PWM02T1H (*(unsigned char volatile xdata *)0xff20)
  372. #define PWM02T1L (*(unsigned char volatile xdata *)0xff21)
  373. #define PWM02T2 (*(unsigned int volatile xdata *)0xff22)
  374. #define PWM02T2H (*(unsigned char volatile xdata *)0xff22)
  375. #define PWM02T2L (*(unsigned char volatile xdata *)0xff23)
  376. #define PWM02CR (*(unsigned char volatile xdata *)0xff24)
  377. #define PWM02HLD (*(unsigned char volatile xdata *)0xff25)
  378. #define PWM03T1 (*(unsigned int volatile xdata *)0xff28)
  379. #define PWM03T1H (*(unsigned char volatile xdata *)0xff28)
  380. #define PWM03T1L (*(unsigned char volatile xdata *)0xff29)
  381. #define PWM03T2 (*(unsigned int volatile xdata *)0xff2a)
  382. #define PWM03T2H (*(unsigned char volatile xdata *)0xff2a)
  383. #define PWM03T2L (*(unsigned char volatile xdata *)0xff2b)
  384. #define PWM03CR (*(unsigned char volatile xdata *)0xff2c)
  385. #define PWM03HLD (*(unsigned char volatile xdata *)0xff2d)
  386. #define PWM04T1 (*(unsigned int volatile xdata *)0xff30)
  387. #define PWM04T1H (*(unsigned char volatile xdata *)0xff30)
  388. #define PWM04T1L (*(unsigned char volatile xdata *)0xff31)
  389. #define PWM04T2 (*(unsigned int volatile xdata *)0xff32)
  390. #define PWM04T2H (*(unsigned char volatile xdata *)0xff32)
  391. #define PWM04T2L (*(unsigned char volatile xdata *)0xff33)
  392. #define PWM04CR (*(unsigned char volatile xdata *)0xff34)
  393. #define PWM04HLD (*(unsigned char volatile xdata *)0xff35)
  394. #define PWM05T1 (*(unsigned int volatile xdata *)0xff38)
  395. #define PWM05T1H (*(unsigned char volatile xdata *)0xff38)
  396. #define PWM05T1L (*(unsigned char volatile xdata *)0xff39)
  397. #define PWM05T2 (*(unsigned int volatile xdata *)0xff3a)
  398. #define PWM05T2H (*(unsigned char volatile xdata *)0xff3a)
  399. #define PWM05T2L (*(unsigned char volatile xdata *)0xff3b)
  400. #define PWM05CR (*(unsigned char volatile xdata *)0xff3c)
  401. #define PWM05HLD (*(unsigned char volatile xdata *)0xff3d)
  402. #define PWM06T1 (*(unsigned int volatile xdata *)0xff40)
  403. #define PWM06T1H (*(unsigned char volatile xdata *)0xff40)
  404. #define PWM06T1L (*(unsigned char volatile xdata *)0xff41)
  405. #define PWM06T2 (*(unsigned int volatile xdata *)0xff42)
  406. #define PWM06T2H (*(unsigned char volatile xdata *)0xff42)
  407. #define PWM06T2L (*(unsigned char volatile xdata *)0xff43)
  408. #define PWM06CR (*(unsigned char volatile xdata *)0xff44)
  409. #define PWM06HLD (*(unsigned char volatile xdata *)0xff45)
  410. #define PWM07T1 (*(unsigned int volatile xdata *)0xff48)
  411. #define PWM07T1H (*(unsigned char volatile xdata *)0xff48)
  412. #define PWM07T1L (*(unsigned char volatile xdata *)0xff49)
  413. #define PWM07T2 (*(unsigned int volatile xdata *)0xff4a)
  414. #define PWM07T2H (*(unsigned char volatile xdata *)0xff4a)
  415. #define PWM07T2L (*(unsigned char volatile xdata *)0xff4b)
  416. #define PWM07CR (*(unsigned char volatile xdata *)0xff4c)
  417. #define PWM07HLD (*(unsigned char volatile xdata *)0xff4d)
  418. #define PWM1C (*(unsigned int volatile xdata *)0xff50)
  419. #define PWM1CH (*(unsigned char volatile xdata *)0xff50)
  420. #define PWM1CL (*(unsigned char volatile xdata *)0xff51)
  421. #define PWM1CKS (*(unsigned char volatile xdata *)0xff52)
  422. #define PWM1IF (*(unsigned char volatile xdata *)0xff55)
  423. #define PWM1FDCR (*(unsigned char volatile xdata *)0xff56)
  424. #define PWM10T1 (*(unsigned int volatile xdata *)0xff60)
  425. #define PWM10T1H (*(unsigned char volatile xdata *)0xff60)
  426. #define PWM10T1L (*(unsigned char volatile xdata *)0xff61)
  427. #define PWM10T2 (*(unsigned int volatile xdata *)0xff62)
  428. #define PWM10T2H (*(unsigned char volatile xdata *)0xff62)
  429. #define PWM10T2L (*(unsigned char volatile xdata *)0xff63)
  430. #define PWM10CR (*(unsigned char volatile xdata *)0xff64)
  431. #define PWM10HLD (*(unsigned char volatile xdata *)0xff65)
  432. #define PWM11T1 (*(unsigned int volatile xdata *)0xff68)
  433. #define PWM11T1H (*(unsigned char volatile xdata *)0xff68)
  434. #define PWM11T1L (*(unsigned char volatile xdata *)0xff69)
  435. #define PWM11T2 (*(unsigned int volatile xdata *)0xff6a)
  436. #define PWM11T2H (*(unsigned char volatile xdata *)0xff6a)
  437. #define PWM11T2L (*(unsigned char volatile xdata *)0xff6b)
  438. #define PWM11CR (*(unsigned char volatile xdata *)0xff6c)
  439. #define PWM11HLD (*(unsigned char volatile xdata *)0xff6d)
  440. #define PWM12T1 (*(unsigned int volatile xdata *)0xff70)
  441. #define PWM12T1H (*(unsigned char volatile xdata *)0xff70)
  442. #define PWM12T1L (*(unsigned char volatile xdata *)0xff71)
  443. #define PWM12T2 (*(unsigned int volatile xdata *)0xff72)
  444. #define PWM12T2H (*(unsigned char volatile xdata *)0xff72)
  445. #define PWM12T2L (*(unsigned char volatile xdata *)0xff73)
  446. #define PWM12CR (*(unsigned char volatile xdata *)0xff74)
  447. #define PWM12HLD (*(unsigned char volatile xdata *)0xff75)
  448. #define PWM13T1 (*(unsigned int volatile xdata *)0xff78)
  449. #define PWM13T1H (*(unsigned char volatile xdata *)0xff78)
  450. #define PWM13T1L (*(unsigned char volatile xdata *)0xff79)
  451. #define PWM13T2 (*(unsigned int volatile xdata *)0xff7a)
  452. #define PWM13T2H (*(unsigned char volatile xdata *)0xff7a)
  453. #define PWM13T2L (*(unsigned char volatile xdata *)0xff7b)
  454. #define PWM13CR (*(unsigned char volatile xdata *)0xff7c)
  455. #define PWM13HLD (*(unsigned char volatile xdata *)0xff7d)
  456. #define PWM14T1 (*(unsigned int volatile xdata *)0xff80)
  457. #define PWM14T1H (*(unsigned char volatile xdata *)0xff80)
  458. #define PWM14T1L (*(unsigned char volatile xdata *)0xff81)
  459. #define PWM14T2 (*(unsigned int volatile xdata *)0xff82)
  460. #define PWM14T2H (*(unsigned char volatile xdata *)0xff82)
  461. #define PWM14T2L (*(unsigned char volatile xdata *)0xff83)
  462. #define PWM14CR (*(unsigned char volatile xdata *)0xff84)
  463. #define PWM14HLD (*(unsigned char volatile xdata *)0xff85)
  464. #define PWM15T1 (*(unsigned int volatile xdata *)0xff88)
  465. #define PWM15T1H (*(unsigned char volatile xdata *)0xff88)
  466. #define PWM15T1L (*(unsigned char volatile xdata *)0xff89)
  467. #define PWM15T2 (*(unsigned int volatile xdata *)0xff8a)
  468. #define PWM15T2H (*(unsigned char volatile xdata *)0xff8a)
  469. #define PWM15T2L (*(unsigned char volatile xdata *)0xff8b)
  470. #define PWM15CR (*(unsigned char volatile xdata *)0xff8c)
  471. #define PWM15HLD (*(unsigned char volatile xdata *)0xff8d)
  472. #define PWM16T1 (*(unsigned int volatile xdata *)0xff90)
  473. #define PWM16T1H (*(unsigned char volatile xdata *)0xff90)
  474. #define PWM16T1L (*(unsigned char volatile xdata *)0xff91)
  475. #define PWM16T2 (*(unsigned int volatile xdata *)0xff92)
  476. #define PWM16T2H (*(unsigned char volatile xdata *)0xff92)
  477. #define PWM16T2L (*(unsigned char volatile xdata *)0xff93)
  478. #define PWM16CR (*(unsigned char volatile xdata *)0xff94)
  479. #define PWM16HLD (*(unsigned char volatile xdata *)0xff95)
  480. #define PWM17T1 (*(unsigned int volatile xdata *)0xff98)
  481. #define PWM17T1H (*(unsigned char volatile xdata *)0xff98)
  482. #define PWM17T1L (*(unsigned char volatile xdata *)0xff99)
  483. #define PWM17T2 (*(unsigned int volatile xdata *)0xff9a)
  484. #define PWM17T2H (*(unsigned char volatile xdata *)0xff9a)
  485. #define PWM17T2L (*(unsigned char volatile xdata *)0xff9b)
  486. #define PWM17CR (*(unsigned char volatile xdata *)0xff9c)
  487. #define PWM17HLD (*(unsigned char volatile xdata *)0xff9d)
  488. #define PWM2C (*(unsigned int volatile xdata *)0xffa0)
  489. #define PWM2CH (*(unsigned char volatile xdata *)0xffa0)
  490. #define PWM2CL (*(unsigned char volatile xdata *)0xffa1)
  491. #define PWM2CKS (*(unsigned char volatile xdata *)0xffa2)
  492. #define PWM2TADC (*(unsigned int volatile xdata *)0xffa3)
  493. #define PWM2TADCH (*(unsigned char volatile xdata *)0xffa3)
  494. #define PWM2TADCL (*(unsigned char volatile xdata *)0xffa4)
  495. #define PWM2IF (*(unsigned char volatile xdata *)0xffa5)
  496. #define PWM2FDCR (*(unsigned char volatile xdata *)0xffa6)
  497. #define PWM20T1 (*(unsigned int volatile xdata *)0xffb0)
  498. #define PWM20T1H (*(unsigned char volatile xdata *)0xffb0)
  499. #define PWM20T1L (*(unsigned char volatile xdata *)0xffb1)
  500. #define PWM20T2 (*(unsigned int volatile xdata *)0xffb2)
  501. #define PWM20T2H (*(unsigned char volatile xdata *)0xffb2)
  502. #define PWM20T2L (*(unsigned char volatile xdata *)0xffb3)
  503. #define PWM20CR (*(unsigned char volatile xdata *)0xffb4)
  504. #define PWM20HLD (*(unsigned char volatile xdata *)0xffb5)
  505. #define PWM21T1 (*(unsigned int volatile xdata *)0xffb8)
  506. #define PWM21T1H (*(unsigned char volatile xdata *)0xffb8)
  507. #define PWM21T1L (*(unsigned char volatile xdata *)0xffb9)
  508. #define PWM21T2 (*(unsigned int volatile xdata *)0xffba)
  509. #define PWM21T2H (*(unsigned char volatile xdata *)0xffba)
  510. #define PWM21T2L (*(unsigned char volatile xdata *)0xffbb)
  511. #define PWM21CR (*(unsigned char volatile xdata *)0xffbc)
  512. #define PWM21HLD (*(unsigned char volatile xdata *)0xffbd)
  513. #define PWM22T1 (*(unsigned int volatile xdata *)0xffc0)
  514. #define PWM22T1H (*(unsigned char volatile xdata *)0xffc0)
  515. #define PWM22T1L (*(unsigned char volatile xdata *)0xffc1)
  516. #define PWM22T2 (*(unsigned int volatile xdata *)0xffc2)
  517. #define PWM22T2H (*(unsigned char volatile xdata *)0xffc2)
  518. #define PWM22T2L (*(unsigned char volatile xdata *)0xffc3)
  519. #define PWM22CR (*(unsigned char volatile xdata *)0xffc4)
  520. #define PWM22HLD (*(unsigned char volatile xdata *)0xffc5)
  521. #define PWM23T1 (*(unsigned int volatile xdata *)0xffc8)
  522. #define PWM23T1H (*(unsigned char volatile xdata *)0xffc8)
  523. #define PWM23T1L (*(unsigned char volatile xdata *)0xffc9)
  524. #define PWM23T2 (*(unsigned int volatile xdata *)0xffca)
  525. #define PWM23T2H (*(unsigned char volatile xdata *)0xffca)
  526. #define PWM23T2L (*(unsigned char volatile xdata *)0xffcb)
  527. #define PWM23CR (*(unsigned char volatile xdata *)0xffcc)
  528. #define PWM23HLD (*(unsigned char volatile xdata *)0xffcd)
  529. #define PWM24T1 (*(unsigned int volatile xdata *)0xffd0)
  530. #define PWM24T1H (*(unsigned char volatile xdata *)0xffd0)
  531. #define PWM24T1L (*(unsigned char volatile xdata *)0xffd1)
  532. #define PWM24T2 (*(unsigned int volatile xdata *)0xffd2)
  533. #define PWM24T2H (*(unsigned char volatile xdata *)0xffd2)
  534. #define PWM24T2L (*(unsigned char volatile xdata *)0xffd3)
  535. #define PWM24CR (*(unsigned char volatile xdata *)0xffd4)
  536. #define PWM24HLD (*(unsigned char volatile xdata *)0xffd5)
  537. #define PWM25T1 (*(unsigned int volatile xdata *)0xffd8)
  538. #define PWM25T1H (*(unsigned char volatile xdata *)0xffd8)
  539. #define PWM25T1L (*(unsigned char volatile xdata *)0xffd9)
  540. #define PWM25T2 (*(unsigned int volatile xdata *)0xffda)
  541. #define PWM25T2H (*(unsigned char volatile xdata *)0xffda)
  542. #define PWM25T2L (*(unsigned char volatile xdata *)0xffdb)
  543. #define PWM25CR (*(unsigned char volatile xdata *)0xffdc)
  544. #define PWM25HLD (*(unsigned char volatile xdata *)0xffdd)
  545. #define PWM26T1 (*(unsigned int volatile xdata *)0xffe0)
  546. #define PWM26T1H (*(unsigned char volatile xdata *)0xffe0)
  547. #define PWM26T1L (*(unsigned char volatile xdata *)0xffe1)
  548. #define PWM26T2 (*(unsigned int volatile xdata *)0xffe2)
  549. #define PWM26T2H (*(unsigned char volatile xdata *)0xffe2)
  550. #define PWM26T2L (*(unsigned char volatile xdata *)0xffe3)
  551. #define PWM26CR (*(unsigned char volatile xdata *)0xffe4)
  552. #define PWM26HLD (*(unsigned char volatile xdata *)0xffe5)
  553. #define PWM27T1 (*(unsigned int volatile xdata *)0xffe8)
  554. #define PWM27T1H (*(unsigned char volatile xdata *)0xffe8)
  555. #define PWM27T1L (*(unsigned char volatile xdata *)0xffe9)
  556. #define PWM27T2 (*(unsigned int volatile xdata *)0xffea)
  557. #define PWM27T2H (*(unsigned char volatile xdata *)0xffea)
  558. #define PWM27T2L (*(unsigned char volatile xdata *)0xffeb)
  559. #define PWM27CR (*(unsigned char volatile xdata *)0xffec)
  560. #define PWM27HLD (*(unsigned char volatile xdata *)0xffed)
  561. /////////////////////////////////////////////////
  562. //FC00H-FCFFH
  563. /////////////////////////////////////////////////
  564. #define PWM3C (*(unsigned int volatile xdata *)0xfc00)
  565. #define PWM3CH (*(unsigned char volatile xdata *)0xfc00)
  566. #define PWM3CL (*(unsigned char volatile xdata *)0xfc01)
  567. #define PWM3CKS (*(unsigned char volatile xdata *)0xfc02)
  568. #define PWM3IF (*(unsigned char volatile xdata *)0xfc05)
  569. #define PWM3FDCR (*(unsigned char volatile xdata *)0xfc06)
  570. #define PWM30T1 (*(unsigned int volatile xdata *)0xfc10)
  571. #define PWM30T1H (*(unsigned char volatile xdata *)0xfc10)
  572. #define PWM30T1L (*(unsigned char volatile xdata *)0xfc11)
  573. #define PWM30T2 (*(unsigned int volatile xdata *)0xfc12)
  574. #define PWM30T2H (*(unsigned char volatile xdata *)0xfc12)
  575. #define PWM30T2L (*(unsigned char volatile xdata *)0xfc13)
  576. #define PWM30CR (*(unsigned char volatile xdata *)0xfc14)
  577. #define PWM30HLD (*(unsigned char volatile xdata *)0xfc15)
  578. #define PWM31T1 (*(unsigned int volatile xdata *)0xfc18)
  579. #define PWM31T1H (*(unsigned char volatile xdata *)0xfc18)
  580. #define PWM31T1L (*(unsigned char volatile xdata *)0xfc19)
  581. #define PWM31T2 (*(unsigned int volatile xdata *)0xfc1a)
  582. #define PWM31T2H (*(unsigned char volatile xdata *)0xfc1a)
  583. #define PWM31T2L (*(unsigned char volatile xdata *)0xfc1b)
  584. #define PWM31CR (*(unsigned char volatile xdata *)0xfc1c)
  585. #define PWM31HLD (*(unsigned char volatile xdata *)0xfc1d)
  586. #define PWM32T1 (*(unsigned int volatile xdata *)0xfc20)
  587. #define PWM32T1H (*(unsigned char volatile xdata *)0xfc20)
  588. #define PWM32T1L (*(unsigned char volatile xdata *)0xfc21)
  589. #define PWM32T2 (*(unsigned int volatile xdata *)0xfc22)
  590. #define PWM32T2H (*(unsigned char volatile xdata *)0xfc22)
  591. #define PWM32T2L (*(unsigned char volatile xdata *)0xfc23)
  592. #define PWM32CR (*(unsigned char volatile xdata *)0xfc24)
  593. #define PWM32HLD (*(unsigned char volatile xdata *)0xfc25)
  594. #define PWM33T1 (*(unsigned int volatile xdata *)0xfc28)
  595. #define PWM33T1H (*(unsigned char volatile xdata *)0xfc28)
  596. #define PWM33T1L (*(unsigned char volatile xdata *)0xfc29)
  597. #define PWM33T2 (*(unsigned int volatile xdata *)0xfc2a)
  598. #define PWM33T2H (*(unsigned char volatile xdata *)0xfc2a)
  599. #define PWM33T2L (*(unsigned char volatile xdata *)0xfc2b)
  600. #define PWM33CR (*(unsigned char volatile xdata *)0xfc2c)
  601. #define PWM33HLD (*(unsigned char volatile xdata *)0xfc2d)
  602. #define PWM34T1 (*(unsigned int volatile xdata *)0xfc30)
  603. #define PWM34T1H (*(unsigned char volatile xdata *)0xfc30)
  604. #define PWM34T1L (*(unsigned char volatile xdata *)0xfc31)
  605. #define PWM34T2 (*(unsigned int volatile xdata *)0xfc32)
  606. #define PWM34T2H (*(unsigned char volatile xdata *)0xfc32)
  607. #define PWM34T2L (*(unsigned char volatile xdata *)0xfc33)
  608. #define PWM34CR (*(unsigned char volatile xdata *)0xfc34)
  609. #define PWM34HLD (*(unsigned char volatile xdata *)0xfc35)
  610. #define PWM35T1 (*(unsigned int volatile xdata *)0xfc38)
  611. #define PWM35T1H (*(unsigned char volatile xdata *)0xfc38)
  612. #define PWM35T1L (*(unsigned char volatile xdata *)0xfc39)
  613. #define PWM35T2 (*(unsigned int volatile xdata *)0xfc3a)
  614. #define PWM35T2H (*(unsigned char volatile xdata *)0xfc3a)
  615. #define PWM35T2L (*(unsigned char volatile xdata *)0xfc3b)
  616. #define PWM35CR (*(unsigned char volatile xdata *)0xfc3c)
  617. #define PWM35HLD (*(unsigned char volatile xdata *)0xfc3d)
  618. #define PWM36T1 (*(unsigned int volatile xdata *)0xfc40)
  619. #define PWM36T1H (*(unsigned char volatile xdata *)0xfc40)
  620. #define PWM36T1L (*(unsigned char volatile xdata *)0xfc41)
  621. #define PWM36T2 (*(unsigned int volatile xdata *)0xfc42)
  622. #define PWM36T2H (*(unsigned char volatile xdata *)0xfc42)
  623. #define PWM36T2L (*(unsigned char volatile xdata *)0xfc43)
  624. #define PWM36CR (*(unsigned char volatile xdata *)0xfc44)
  625. #define PWM36HLD (*(unsigned char volatile xdata *)0xfc45)
  626. #define PWM37T1 (*(unsigned int volatile xdata *)0xfc48)
  627. #define PWM37T1H (*(unsigned char volatile xdata *)0xfc48)
  628. #define PWM37T1L (*(unsigned char volatile xdata *)0xfc49)
  629. #define PWM37T2 (*(unsigned int volatile xdata *)0xfc4a)
  630. #define PWM37T2H (*(unsigned char volatile xdata *)0xfc4a)
  631. #define PWM37T2L (*(unsigned char volatile xdata *)0xfc4b)
  632. #define PWM37CR (*(unsigned char volatile xdata *)0xfc4c)
  633. #define PWM37HLD (*(unsigned char volatile xdata *)0xfc4d)
  634. #define PWM4C (*(unsigned int volatile xdata *)0xfc50)
  635. #define PWM4CH (*(unsigned char volatile xdata *)0xfc50)
  636. #define PWM4CL (*(unsigned char volatile xdata *)0xfc51)
  637. #define PWM4CKS (*(unsigned char volatile xdata *)0xfc52)
  638. #define PWM4TADC (*(unsigned int volatile xdata *)0xfc53)
  639. #define PWM4TADCH (*(unsigned char volatile xdata *)0xfc53)
  640. #define PWM4TADCL (*(unsigned char volatile xdata *)0xfc54)
  641. #define PWM4IF (*(unsigned char volatile xdata *)0xfc55)
  642. #define PWM4FDCR (*(unsigned char volatile xdata *)0xfc56)
  643. #define PWM40T1 (*(unsigned int volatile xdata *)0xfc60)
  644. #define PWM40T1H (*(unsigned char volatile xdata *)0xfc60)
  645. #define PWM40T1L (*(unsigned char volatile xdata *)0xfc61)
  646. #define PWM40T2 (*(unsigned int volatile xdata *)0xfc62)
  647. #define PWM40T2H (*(unsigned char volatile xdata *)0xfc62)
  648. #define PWM40T2L (*(unsigned char volatile xdata *)0xfc63)
  649. #define PWM40CR (*(unsigned char volatile xdata *)0xfc64)
  650. #define PWM40HLD (*(unsigned char volatile xdata *)0xfc65)
  651. #define PWM41T1 (*(unsigned int volatile xdata *)0xfc68)
  652. #define PWM41T1H (*(unsigned char volatile xdata *)0xfc68)
  653. #define PWM41T1L (*(unsigned char volatile xdata *)0xfc69)
  654. #define PWM41T2 (*(unsigned int volatile xdata *)0xfc6a)
  655. #define PWM41T2H (*(unsigned char volatile xdata *)0xfc6a)
  656. #define PWM41T2L (*(unsigned char volatile xdata *)0xfc6b)
  657. #define PWM41CR (*(unsigned char volatile xdata *)0xfc6c)
  658. #define PWM41HLD (*(unsigned char volatile xdata *)0xfc6d)
  659. #define PWM42T1 (*(unsigned int volatile xdata *)0xfc70)
  660. #define PWM42T1H (*(unsigned char volatile xdata *)0xfc70)
  661. #define PWM42T1L (*(unsigned char volatile xdata *)0xfc71)
  662. #define PWM42T2 (*(unsigned int volatile xdata *)0xfc72)
  663. #define PWM42T2H (*(unsigned char volatile xdata *)0xfc72)
  664. #define PWM42T2L (*(unsigned char volatile xdata *)0xfc73)
  665. #define PWM42CR (*(unsigned char volatile xdata *)0xfc74)
  666. #define PWM42HLD (*(unsigned char volatile xdata *)0xfc75)
  667. #define PWM43T1 (*(unsigned int volatile xdata *)0xfc78)
  668. #define PWM43T1H (*(unsigned char volatile xdata *)0xfc78)
  669. #define PWM43T1L (*(unsigned char volatile xdata *)0xfc79)
  670. #define PWM43T2 (*(unsigned int volatile xdata *)0xfc7a)
  671. #define PWM43T2H (*(unsigned char volatile xdata *)0xfc7a)
  672. #define PWM43T2L (*(unsigned char volatile xdata *)0xfc7b)
  673. #define PWM43CR (*(unsigned char volatile xdata *)0xfc7c)
  674. #define PWM43HLD (*(unsigned char volatile xdata *)0xfc7d)
  675. #define PWM44T1 (*(unsigned int volatile xdata *)0xfc80)
  676. #define PWM44T1H (*(unsigned char volatile xdata *)0xfc80)
  677. #define PWM44T1L (*(unsigned char volatile xdata *)0xfc81)
  678. #define PWM44T2 (*(unsigned int volatile xdata *)0xfc82)
  679. #define PWM44T2H (*(unsigned char volatile xdata *)0xfc82)
  680. #define PWM44T2L (*(unsigned char volatile xdata *)0xfc83)
  681. #define PWM44CR (*(unsigned char volatile xdata *)0xfc84)
  682. #define PWM44HLD (*(unsigned char volatile xdata *)0xfc85)
  683. #define PWM45T1 (*(unsigned int volatile xdata *)0xfc88)
  684. #define PWM45T1H (*(unsigned char volatile xdata *)0xfc88)
  685. #define PWM45T1L (*(unsigned char volatile xdata *)0xfc89)
  686. #define PWM45T2 (*(unsigned int volatile xdata *)0xfc8a)
  687. #define PWM45T2H (*(unsigned char volatile xdata *)0xfc8a)
  688. #define PWM45T2L (*(unsigned char volatile xdata *)0xfc8b)
  689. #define PWM45CR (*(unsigned char volatile xdata *)0xfc8c)
  690. #define PWM45HLD (*(unsigned char volatile xdata *)0xfc8d)
  691. #define PWM46T1 (*(unsigned int volatile xdata *)0xfc90)
  692. #define PWM46T1H (*(unsigned char volatile xdata *)0xfc90)
  693. #define PWM46T1L (*(unsigned char volatile xdata *)0xfc91)
  694. #define PWM46T2 (*(unsigned int volatile xdata *)0xfc92)
  695. #define PWM46T2H (*(unsigned char volatile xdata *)0xfc92)
  696. #define PWM46T2L (*(unsigned char volatile xdata *)0xfc93)
  697. #define PWM46CR (*(unsigned char volatile xdata *)0xfc94)
  698. #define PWM46HLD (*(unsigned char volatile xdata *)0xfc95)
  699. #define PWM47T1 (*(unsigned int volatile xdata *)0xfc98)
  700. #define PWM47T1H (*(unsigned char volatile xdata *)0xfc98)
  701. #define PWM47T1L (*(unsigned char volatile xdata *)0xfc99)
  702. #define PWM47T2 (*(unsigned int volatile xdata *)0xfc9a)
  703. #define PWM47T2H (*(unsigned char volatile xdata *)0xfc9a)
  704. #define PWM47T2L (*(unsigned char volatile xdata *)0xfc9b)
  705. #define PWM47CR (*(unsigned char volatile xdata *)0xfc9c)
  706. #define PWM47HLD (*(unsigned char volatile xdata *)0xfc9d)
  707. #define PWM5C (*(unsigned int volatile xdata *)0xfca0)
  708. #define PWM5CH (*(unsigned char volatile xdata *)0xfca0)
  709. #define PWM5CL (*(unsigned char volatile xdata *)0xfca1)
  710. #define PWM5CKS (*(unsigned char volatile xdata *)0xfca2)
  711. #define PWM5IF (*(unsigned char volatile xdata *)0xfca5)
  712. #define PWM5FDCR (*(unsigned char volatile xdata *)0xfca6)
  713. #define PWM50T1 (*(unsigned int volatile xdata *)0xfcb0)
  714. #define PWM50T1H (*(unsigned char volatile xdata *)0xfcb0)
  715. #define PWM50T1L (*(unsigned char volatile xdata *)0xfcb1)
  716. #define PWM50T2 (*(unsigned int volatile xdata *)0xfcb2)
  717. #define PWM50T2H (*(unsigned char volatile xdata *)0xfcb2)
  718. #define PWM50T2L (*(unsigned char volatile xdata *)0xfcb3)
  719. #define PWM50CR (*(unsigned char volatile xdata *)0xfcb4)
  720. #define PWM50HLD (*(unsigned char volatile xdata *)0xfcb5)
  721. #define PWM51T1 (*(unsigned int volatile xdata *)0xfcb8)
  722. #define PWM51T1H (*(unsigned char volatile xdata *)0xfcb8)
  723. #define PWM51T1L (*(unsigned char volatile xdata *)0xfcb9)
  724. #define PWM51T2 (*(unsigned int volatile xdata *)0xfcba)
  725. #define PWM51T2H (*(unsigned char volatile xdata *)0xfcba)
  726. #define PWM51T2L (*(unsigned char volatile xdata *)0xfcbb)
  727. #define PWM51CR (*(unsigned char volatile xdata *)0xfcbc)
  728. #define PWM51HLD (*(unsigned char volatile xdata *)0xfcbd)
  729. #define PWM52T1 (*(unsigned int volatile xdata *)0xfcc0)
  730. #define PWM52T1H (*(unsigned char volatile xdata *)0xfcc0)
  731. #define PWM52T1L (*(unsigned char volatile xdata *)0xfcc1)
  732. #define PWM52T2 (*(unsigned int volatile xdata *)0xfcc2)
  733. #define PWM52T2H (*(unsigned char volatile xdata *)0xfcc2)
  734. #define PWM52T2L (*(unsigned char volatile xdata *)0xfcc3)
  735. #define PWM52CR (*(unsigned char volatile xdata *)0xfcc4)
  736. #define PWM52HLD (*(unsigned char volatile xdata *)0xfcc5)
  737. #define PWM53T1 (*(unsigned int volatile xdata *)0xfcc8)
  738. #define PWM53T1H (*(unsigned char volatile xdata *)0xfcc8)
  739. #define PWM53T1L (*(unsigned char volatile xdata *)0xfcc9)
  740. #define PWM53T2 (*(unsigned int volatile xdata *)0xfcca)
  741. #define PWM53T2H (*(unsigned char volatile xdata *)0xfcca)
  742. #define PWM53T2L (*(unsigned char volatile xdata *)0xfccb)
  743. #define PWM53CR (*(unsigned char volatile xdata *)0xfccc)
  744. #define PWM53HLD (*(unsigned char volatile xdata *)0xfccd)
  745. #define PWM54T1 (*(unsigned int volatile xdata *)0xfcd0)
  746. #define PWM54T1H (*(unsigned char volatile xdata *)0xfcd0)
  747. #define PWM54T1L (*(unsigned char volatile xdata *)0xfcd1)
  748. #define PWM54T2 (*(unsigned int volatile xdata *)0xfcd2)
  749. #define PWM54T2H (*(unsigned char volatile xdata *)0xfcd2)
  750. #define PWM54T2L (*(unsigned char volatile xdata *)0xfcd3)
  751. #define PWM54CR (*(unsigned char volatile xdata *)0xfcd4)
  752. #define PWM54HLD (*(unsigned char volatile xdata *)0xfcd5)
  753. #define PWM55T1 (*(unsigned int volatile xdata *)0xfcd8)
  754. #define PWM55T1H (*(unsigned char volatile xdata *)0xfcd8)
  755. #define PWM55T1L (*(unsigned char volatile xdata *)0xfcd9)
  756. #define PWM55T2 (*(unsigned int volatile xdata *)0xfcda)
  757. #define PWM55T2H (*(unsigned char volatile xdata *)0xfcda)
  758. #define PWM55T2L (*(unsigned char volatile xdata *)0xfcdb)
  759. #define PWM55CR (*(unsigned char volatile xdata *)0xfcdc)
  760. #define PWM55HLD (*(unsigned char volatile xdata *)0xfcdd)
  761. #define PWM56T1 (*(unsigned int volatile xdata *)0xfce0)
  762. #define PWM56T1H (*(unsigned char volatile xdata *)0xfce0)
  763. #define PWM56T1L (*(unsigned char volatile xdata *)0xfce1)
  764. #define PWM56T2 (*(unsigned int volatile xdata *)0xfce2)
  765. #define PWM56T2H (*(unsigned char volatile xdata *)0xfce2)
  766. #define PWM56T2L (*(unsigned char volatile xdata *)0xfce3)
  767. #define PWM56CR (*(unsigned char volatile xdata *)0xfce4)
  768. #define PWM56HLD (*(unsigned char volatile xdata *)0xfce5)
  769. #define PWM57T1 (*(unsigned int volatile xdata *)0xfce8)
  770. #define PWM57T1H (*(unsigned char volatile xdata *)0xfce8)
  771. #define PWM57T1L (*(unsigned char volatile xdata *)0xfce9)
  772. #define PWM57T2 (*(unsigned int volatile xdata *)0xfcea)
  773. #define PWM57T2H (*(unsigned char volatile xdata *)0xfcea)
  774. #define PWM57T2L (*(unsigned char volatile xdata *)0xfceb)
  775. #define PWM57CR (*(unsigned char volatile xdata *)0xfcec)
  776. #define PWM57HLD (*(unsigned char volatile xdata *)0xfced)
  777. // 7 6 5 4 3 2 1 0 Reset Value
  778. //sfr PWMSET = 0xF1H; ENGLBSET PWMRST ENPWM5 ENPWM4 ENPWM3 ENPWM2 ENPWM1 ENPWM0 0000,0000 /* 增强型PWM全局配置寄存器 */
  779. #define PWM15_SET_Uniform() PWMSET |= 0x80 //1:6组PWM采用统一的设置方式
  780. #define PWM15_SET_Independent() PWMSET &= ~0x80 //0:6组PWM采用各自独立的设置方式
  781. #define PWM15_Reset() PWMSET |= 0x40 //1:复位所有PWM的XFR寄存器,SFR不变
  782. #define PWM15_PWM5_Enable() PWMSET |= 0x20 //1:使能PWM5(包括 PWM50~PWM54)。
  783. #define PWM15_PWM5_Disable() PWMSET &= ~0x20 //0:关闭PWM5
  784. #define PWM15_PWM4_Enable() PWMSET |= 0x10 //1:使能PWM4(包括 PWM40~PWM47)。
  785. #define PWM15_PWM4_Disable() PWMSET &= ~0x10 //0:关闭PWM4
  786. #define PWM15_PWM3_Enable() PWMSET |= 0x08 //1:使能PWM3(包括 PWM30~PWM37)。
  787. #define PWM15_PWM3_Disable() PWMSET &= ~0x08 //0:关闭PWM3
  788. #define PWM15_PWM2_Enable() PWMSET |= 0x04 //1:使能PWM2(包括 PWM20~PWM27)。
  789. #define PWM15_PWM2_Disable() PWMSET &= ~0x04 //0:关闭PWM2
  790. #define PWM15_PWM1_Enable() PWMSET |= 0x02 //1:使能PWM1(包括 PWM10~PWM17)。
  791. #define PWM15_PWM1_Disable() PWMSET &= ~0x02 //0:关闭PWM1
  792. #define PWM15_PWM0_Enable() PWMSET |= 0x01 //1:使能PWM0(包括 PWM00~PWM07)。
  793. #define PWM15_PWM0_Disable() PWMSET &= ~0x01 //0:关闭PWM0
  794. // 7 6 5 4 3 2 1 0 Reset Value
  795. //sfr PWMCFG01= 0xF6H; PWM1CBIF EPWM1CBI FLTPS0 PWM1CEN PWM0CBIF EPWM0CBI ENPWM0TA PWM0CEN 0000,0000 /* 增强型PWM配置寄存器 */
  796. //sfr PWMCFG23= 0xF7H; PWM3CBIF EPWM3CBI FLTPS1 PWM3CEN PWM2CBIF EPWM2CBI ENPWM2TA PWM2CEN 0000,0000 /* 增强型PWM配置寄存器 */
  797. //sfr PWMCFG45= 0xFEH; PWM5CBIF EPWM5CBI FLTPS2 PWM5CEN PWM4CBIF EPWM4CBI ENPWM4TA PWM4CEN 0000,0000 /* 增强型PWM配置寄存器 */
  798. #define PWM1CBIF 0x80
  799. #define PWM0CBIF 0x08
  800. #define FLTPSn 0x20
  801. #define PWM15_Counter1Int_Enable() PWMCFG01 |= 0x40 //1:使能计数器归零中断
  802. #define PWM15_Counter1Int_Disable() PWMCFG01 &= ~0x40 //0:关闭计数器归零中断
  803. #define PWM15_Counter1_Enable() PWMCFG01 |= 0x10 //1:使能计数器
  804. #define PWM15_Counter1_Disable() PWMCFG01 &= ~0x10 //0:关闭计数器
  805. #define PWM15_Counter0Int_Enable() PWMCFG01 |= 0x04 //1:使能计数器归零中断
  806. #define PWM15_Counter0Int_Disable() PWMCFG01 &= ~0x04 //0:关闭计数器归零中断
  807. #define PWM15_Counter0_Enable() PWMCFG01 |= 0x01 //1:使能计数器
  808. #define PWM15_Counter0_Disable() PWMCFG01 &= ~0x01 //0:关闭计数器
  809. #define PWM15_PWM0_ADC_Enable() PWMCFG01 |= 0x02 //1:PWM与ADC相关联
  810. #define PWM15_PWM0_ADC_Disable() PWMCFG01 &= ~0x02 //0:PWM与ADC不关联
  811. #define PWM15_Counter3Int_Enable() PWMCFG23 |= 0x40 //1:使能计数器归零中断
  812. #define PWM15_Counter3Int_Disable() PWMCFG23 &= ~0x40 //0:关闭计数器归零中断
  813. #define PWM15_Counter3_Enable() PWMCFG23 |= 0x10 //1:使能计数器
  814. #define PWM15_Counter3_Disable() PWMCFG23 &= ~0x10 //0:关闭计数器
  815. #define PWM15_Counter2Int_Enable() PWMCFG23 |= 0x04 //1:使能计数器归零中断
  816. #define PWM15_Counter2Int_Disable() PWMCFG23 &= ~0x04 //0:关闭计数器归零中断
  817. #define PWM15_Counter2_Enable() PWMCFG23 |= 0x01 //1:使能计数器
  818. #define PWM15_Counter2_Disable() PWMCFG23 &= ~0x01 //0:关闭计数器
  819. #define PWM15_PWM2_ADC_Enable() PWMCFG23 |= 0x02 //1:PWM与ADC相关联
  820. #define PWM15_PWM2_ADC_Disable() PWMCFG23 &= ~0x02 //0:PWM与ADC不关联
  821. #define PWM15_Counter5Int_Enable() PWMCFG45 |= 0x40 //1:使能计数器归零中断
  822. #define PWM15_Counter5Int_Disable() PWMCFG45 &= ~0x40 //0:关闭计数器归零中断
  823. #define PWM15_Counter5_Enable() PWMCFG45 |= 0x10 //1:使能计数器
  824. #define PWM15_Counter5_Disable() PWMCFG45 &= ~0x10 //0:关闭计数器
  825. #define PWM15_Counter4Int_Enable() PWMCFG45 |= 0x04 //1:使能计数器归零中断
  826. #define PWM15_Counter4Int_Disable() PWMCFG45 &= ~0x04 //0:关闭计数器归零中断
  827. #define PWM15_Counter4_Enable() PWMCFG45 |= 0x01 //1:使能计数器
  828. #define PWM15_Counter4_Disable() PWMCFG45 &= ~0x01 //0:关闭计数器
  829. #define PWM15_PWM4_ADC_Enable() PWMCFG45 |= 0x02 //1:PWM与ADC相关联
  830. #define PWM15_PWM4_ADC_Disable() PWMCFG45 &= ~0x02 //0:PWM与ADC不关联
  831. /* PWMnIF */
  832. #define C7IF = (1<<7)
  833. #define C6IF = (1<<6)
  834. #define C5IF = (1<<5)
  835. #define C4IF = (1<<4)
  836. #define C3IF = (1<<3)
  837. #define C2IF = (1<<2)
  838. #define C1IF = (1<<1)
  839. #define C0IF = 1
  840. /* PWMnFDCR */
  841. #define INVCMP = (1<<7)
  842. #define INVIO = (1<<6)
  843. #define ENFD = (1<<5)
  844. #define FLTFLIO = (1<<4)
  845. #define EFDI = (1<<3)
  846. #define FDCMP = (1<<2)
  847. #define FDIO = (1<<1)
  848. #define FDIF = 1
  849. // 7 6 5 4 3 2 1 0 Reset Value
  850. //sfr PWM0CKS = 0xFF02H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  851. //sfr PWM1CKS = 0xFF52H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  852. //sfr PWM2CKS = 0xFFA2H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  853. //sfr PWM3CKS = 0xFC02H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  854. //sfr PWM4CKS = 0xFC52H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  855. //sfr PWM5CKS = 0xFCA2H; - - - SELT2 PWM_PS[3:0] xxx0,0000 /* 增强型PWM时钟选择存器 */
  856. #define PWM0_PS_Clock() PWM0CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  857. #define PWM0_T2_Clock() PWM0CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  858. #define PWM0_PS_Set(n) PWM0CKS = (PWM0CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  859. #define PWM1_PS_Clock() PWM1CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  860. #define PWM1_T2_Clock() PWM1CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  861. #define PWM1_PS_Set(n) PWM1CKS = (PWM1CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  862. #define PWM2_PS_Clock() PWM2CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  863. #define PWM2_T2_Clock() PWM2CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  864. #define PWM2_PS_Set(n) PWM2CKS = (PWM2CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  865. #define PWM3_PS_Clock() PWM3CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  866. #define PWM3_T2_Clock() PWM3CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  867. #define PWM3_PS_Set(n) PWM3CKS = (PWM3CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  868. #define PWM4_PS_Clock() PWM4CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  869. #define PWM4_T2_Clock() PWM4CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  870. #define PWM4_PS_Set(n) PWM4CKS = (PWM4CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  871. #define PWM5_PS_Clock() PWM5CKS &= ~0x10 //0:PWMn时钟源为系统时钟分频后的时钟
  872. #define PWM5_T2_Clock() PWM5CKS |= 0x10 //1:PWMn时钟源为定时器2的溢出脉冲
  873. #define PWM5_PS_Set(n) PWM5CKS = (PWM5CKS & ~0x0F) | (n & 0x0F) //系统时钟预分频参数设置:SYSclk / (PWM_PS+1)
  874. /* PWMnTADC */
  875. #define PWM15_PWM0TADC(n) PWM0TADC = (n & 0x7fff) //PWM触发ADC时间点
  876. #define PWM15_PWM2TADC(n) PWM2TADC = (n & 0x7fff) //PWM触发ADC时间点
  877. #define PWM15_PWM4TADC(n) PWM4TADC = (n & 0x7fff) //PWM触发ADC时间点
  878. /* PWMnTADC */
  879. #define PWM15_PWM0TADC(n) PWM0TADC = (n & 0x7fff) //PWM触发ADC时间点
  880. /* BIT Registers */
  881. /* PSW */
  882. sbit CY = PSW^7;
  883. sbit AC = PSW^6;
  884. sbit F0 = PSW^5;
  885. sbit RS1 = PSW^4;
  886. sbit RS0 = PSW^3;
  887. sbit OV = PSW^2;
  888. sbit F1 = PSW^1;
  889. sbit P = PSW^0;
  890. /* TCON */
  891. sbit TF1 = TCON^7; //定时器1溢出中断标志位
  892. sbit TR1 = TCON^6; //定时器1运行控制位
  893. sbit TF0 = TCON^5; //定时器0溢出中断标志位
  894. sbit TR0 = TCON^4; //定时器0运行控制位
  895. sbit IE1 = TCON^3; //外中断1标志位
  896. sbit IT1 = TCON^2; //外中断1信号方式控制位,1:下降沿中断,0:上升下降均中断。
  897. sbit IE0 = TCON^1; //外中断0标志位
  898. sbit IT0 = TCON^0; //外中断0信号方式控制位,1:下降沿中断,0:上升下降均中断。
  899. /* P0 */
  900. sbit P00 = P0^0;
  901. sbit P01 = P0^1;
  902. sbit P02 = P0^2;
  903. sbit P03 = P0^3;
  904. sbit P04 = P0^4;
  905. sbit P05 = P0^5;
  906. sbit P06 = P0^6;
  907. sbit P07 = P0^7;
  908. /* P1 */
  909. sbit P10 = P1^0;
  910. sbit P11 = P1^1;
  911. sbit P12 = P1^2;
  912. sbit P13 = P1^3;
  913. sbit P14 = P1^4;
  914. sbit P15 = P1^5;
  915. sbit P16 = P1^6;
  916. sbit P17 = P1^7;
  917. sbit RXD2 = P1^0;
  918. sbit TXD2 = P1^1;
  919. sbit CCP1 = P1^0;
  920. sbit CCP0 = P1^1;
  921. sbit SPI_SS = P1^2;
  922. sbit SPI_MOSI = P1^3;
  923. sbit SPI_MISO = P1^4;
  924. sbit SPI_SCLK = P1^5;
  925. sbit SPI_SS_2 = P2^2;
  926. sbit SPI_MOSI_2 = P2^3;
  927. sbit SPI_MISO_2 = P2^4;
  928. sbit SPI_SCLK_2 = P2^5;
  929. sbit SPI_SS_3 = P5^4;
  930. sbit SPI_MOSI_3 = P4^0;
  931. sbit SPI_MISO_3 = P4^1;
  932. sbit SPI_SCLK_3 = P4^3;
  933. sbit SPI_SS_4 = P3^5;
  934. sbit SPI_MOSI_4 = P3^4;
  935. sbit SPI_MISO_4 = P3^3;
  936. sbit SPI_SCLK_4 = P3^2;
  937. /* P2 */
  938. sbit P20 = P2^0;
  939. sbit P21 = P2^1;
  940. sbit P22 = P2^2;
  941. sbit P23 = P2^3;
  942. sbit P24 = P2^4;
  943. sbit P25 = P2^5;
  944. sbit P26 = P2^6;
  945. sbit P27 = P2^7;
  946. /* P3 */
  947. sbit P30 = P3^0;
  948. sbit P31 = P3^1;
  949. sbit P32 = P3^2;
  950. sbit P33 = P3^3;
  951. sbit P34 = P3^4;
  952. sbit P35 = P3^5;
  953. sbit P36 = P3^6;
  954. sbit P37 = P3^7;
  955. sbit RXD = P3^0;
  956. sbit TXD = P3^1;
  957. sbit INT0 = P3^2;
  958. sbit INT1 = P3^3;
  959. sbit T0 = P3^4;
  960. sbit T1 = P3^5;
  961. sbit WR = P3^6;
  962. sbit RD = P3^7;
  963. sbit INT2 = P3^6;
  964. sbit INT3 = P3^7;
  965. sbit INT4 = P3^0;
  966. sbit CCP2 = P3^7;
  967. sbit CLKOUT0 = P3^5;
  968. sbit CLKOUT1 = P3^4;
  969. /* P4 */
  970. sbit P40 = P4^0;
  971. sbit P41 = P4^1;
  972. sbit P42 = P4^2;
  973. sbit P43 = P4^3;
  974. sbit P44 = P4^4;
  975. sbit P45 = P4^5;
  976. sbit P46 = P4^6;
  977. sbit P47 = P4^7;
  978. /* P5 */
  979. sbit P50 = P5^0;
  980. sbit P51 = P5^1;
  981. sbit P52 = P5^2;
  982. sbit P53 = P5^3;
  983. sbit P54 = P5^4;
  984. sbit P55 = P5^5;
  985. sbit P56 = P5^6;
  986. sbit P57 = P5^7;
  987. /* P6 */
  988. sbit P60 = P6^0;
  989. sbit P61 = P6^1;
  990. sbit P62 = P6^2;
  991. sbit P63 = P6^3;
  992. sbit P64 = P6^4;
  993. sbit P65 = P6^5;
  994. sbit P66 = P6^6;
  995. sbit P67 = P6^7;
  996. /* P7 */
  997. sbit P70 = P7^0;
  998. sbit P71 = P7^1;
  999. sbit P72 = P7^2;
  1000. sbit P73 = P7^3;
  1001. sbit P74 = P7^4;
  1002. sbit P75 = P7^5;
  1003. sbit P76 = P7^6;
  1004. sbit P77 = P7^7;
  1005. /* SCON */
  1006. sbit SM0 = SCON^7; //SM0/FE SM0 SM1 = 00 ~ 11: 方式0~3
  1007. sbit SM1 = SCON^6; //
  1008. sbit SM2 = SCON^5; //多机通讯
  1009. sbit REN = SCON^4; //接收允许
  1010. sbit TB8 = SCON^3; //发送数据第8位
  1011. sbit RB8 = SCON^2; //接收数据第8位
  1012. sbit TI = SCON^1; //发送中断标志位
  1013. sbit RI = SCON^0; //接收中断标志位
  1014. /* IE */
  1015. sbit EA = IE^7; //中断允许总控制位
  1016. sbit ELVD = IE^6; //低压监测中断允许位
  1017. sbit EADC = IE^5; //ADC 中断 允许位
  1018. sbit ES = IE^4; //串行中断 允许控制位
  1019. sbit ET1 = IE^3; //定时中断1允许控制位
  1020. sbit EX1 = IE^2; //外部中断1允许控制位
  1021. sbit ET0 = IE^1; //定时中断0允许控制位
  1022. sbit EX0 = IE^0; //外部中断0允许控制位
  1023. sbit ACC0 = ACC^0;
  1024. sbit ACC1 = ACC^1;
  1025. sbit ACC2 = ACC^2;
  1026. sbit ACC3 = ACC^3;
  1027. sbit ACC4 = ACC^4;
  1028. sbit ACC5 = ACC^5;
  1029. sbit ACC6 = ACC^6;
  1030. sbit ACC7 = ACC^7;
  1031. sbit B0 = B^0;
  1032. sbit B1 = B^1;
  1033. sbit B2 = B^2;
  1034. sbit B3 = B^3;
  1035. sbit B4 = B^4;
  1036. sbit B5 = B^5;
  1037. sbit B6 = B^6;
  1038. sbit B7 = B^7;
  1039. // 7 6 5 4 3 2 1 0 Reset Value
  1040. //sfr IE2 = 0xAF; ETKSUI ET4 ET3 ES4 ES3 ET2 ESPI ES2 x000,0000B //Auxiliary Interrupt
  1041. #define SPI_INT_ENABLE() IE2 |= 2 /* 允许SPI中断 */
  1042. #define SPI_INT_DISABLE() IE2 &= ~2 /* 允许SPI中断 */
  1043. #define UART2_INT_ENABLE() IE2 |= 1 /* 允许串口2中断 */
  1044. #define UART2_INT_DISABLE() IE2 &= ~1 /* 允许串口2中断 */
  1045. // 7 6 5 4 3 2 1 0 Reset Value
  1046. //sfr IP2 = 0xB5; // PPWM2FD PI2C PCMP PX4 PPWM0FD PPWM0 PSPI PS2 0000,0000
  1047. #define PUSB 0x80
  1048. #define PPWM2FD 0x80
  1049. #define PTKSU 0x80
  1050. #define PI2C 0x40
  1051. #define PCMP 0x20
  1052. #define PX4 0x10
  1053. #define PPWM0FD 0x08
  1054. #define PPWM0 0x04
  1055. #define PSPI 0x02
  1056. #define PS2 0x01
  1057. // 7 6 5 4 3 2 1 0 Reset Value
  1058. //sfr IP2H = 0xB6; // PPWM2FDH PI2CH PCMPH PX4H PPWM0FDH PPWM0H PSPIH PS2H 0000,0000
  1059. #define PUSBH 0x80
  1060. #define PPWM2FDH 0x80
  1061. #define PTKSUH 0x80
  1062. #define PI2CH 0x40
  1063. #define PCMPH 0x20
  1064. #define PX4H 0x10
  1065. #define PPWM0FDH 0x08
  1066. #define PPWM0H 0x04
  1067. #define PSPIH 0x02
  1068. #define PS2H 0x01
  1069. //串口2中断优先级控制
  1070. #define UART2_Priority(n) do{if(n == 0) IP2H &= ~PS2H, IP2 &= ~PS2; \
  1071. if(n == 1) IP2H &= ~PS2H, IP2 |= PS2; \
  1072. if(n == 2) IP2H |= PS2H, IP2 &= ~PS2; \
  1073. if(n == 3) IP2H |= PS2H, IP2 |= PS2; \
  1074. }while(0)
  1075. //SPI中断优先级控制
  1076. #define SPI_Priority(n) do{if(n == 0) IP2H &= ~PSPIH, IP2 &= ~PSPI; \
  1077. if(n == 1) IP2H &= ~PSPIH, IP2 |= PSPI; \
  1078. if(n == 2) IP2H |= PSPIH, IP2 &= ~PSPI; \
  1079. if(n == 3) IP2H |= PSPIH, IP2 |= PSPI; \
  1080. }while(0)
  1081. //外部中断4中断优先级控制
  1082. #define INT4_Priority(n) do{if(n == 0) IP2H &= ~PX4H, IP2 &= ~PX4; \
  1083. if(n == 1) IP2H &= ~PX4H, IP2 |= PX4; \
  1084. if(n == 2) IP2H |= PX4H, IP2 &= ~PX4; \
  1085. if(n == 3) IP2H |= PX4H, IP2 |= PX4; \
  1086. }while(0)
  1087. //比较器中断优先级控制
  1088. #define CMP_Priority(n) do{if(n == 0) IP2H &= ~PCMPH, IP2 &= ~PCMP; \
  1089. if(n == 1) IP2H &= ~PCMPH, IP2 |= PCMP; \
  1090. if(n == 2) IP2H |= PCMPH, IP2 &= ~PCMP; \
  1091. if(n == 3) IP2H |= PCMPH, IP2 |= PCMP; \
  1092. }while(0)
  1093. //I2C中断优先级控制
  1094. #define I2C_Priority(n) do{if(n == 0) IP2H &= ~PI2CH, IP2 &= ~PI2C; \
  1095. if(n == 1) IP2H &= ~PI2CH, IP2 |= PI2C; \
  1096. if(n == 2) IP2H |= PI2CH, IP2 &= ~PI2C; \
  1097. if(n == 3) IP2H |= PI2CH, IP2 |= PI2C; \
  1098. }while(0)
  1099. //增强型PWM0中断优先级控制
  1100. #define PWM0_Priority(n) do{if(n == 0) IP2H &= ~PPWM0H, IP2 &= ~PPWM0; \
  1101. if(n == 1) IP2H &= ~PPWM0H, IP2 |= PPWM0; \
  1102. if(n == 2) IP2H |= PPWM0H, IP2 &= ~PPWM0; \
  1103. if(n == 3) IP2H |= PPWM0H, IP2 |= PPWM0; \
  1104. }while(0)
  1105. //增强型PWM0异常检测中断优先级控制
  1106. #define PWM0FD_Priority(n) do{if(n == 0) IP2H &= ~PPWM0FDH, IP2 &= ~PPWM0FD; \
  1107. if(n == 1) IP2H &= ~PPWM0FDH, IP2 |= PPWM0FD; \
  1108. if(n == 2) IP2H |= PPWM0FDH, IP2 &= ~PPWM0FD; \
  1109. if(n == 3) IP2H |= PPWM0FDH, IP2 |= PPWM0FD; \
  1110. }while(0)
  1111. //增强型PWM2异常检测中断优先级控制
  1112. #define PWM2FD_Priority(n) do{if(n == 0) IP2H &= ~PPWM2FDH, IP2 &= ~PPWM2FD; \
  1113. if(n == 1) IP2H &= ~PPWM2FDH, IP2 |= PPWM2FD; \
  1114. if(n == 2) IP2H |= PPWM2FDH, IP2 &= ~PPWM2FD; \
  1115. if(n == 3) IP2H |= PPWM2FDH, IP2 |= PPWM2FD; \
  1116. }while(0)
  1117. //触摸按键中断优先级控制
  1118. #define PTKSU_Priority(n) do{if(n == 0) IP2H &= ~PTKSUH, IP2 &= ~PTKSU; \
  1119. if(n == 1) IP2H &= ~PTKSUH, IP2 |= PTKSU; \
  1120. if(n == 2) IP2H |= PTKSUH, IP2 &= ~PTKSU; \
  1121. if(n == 3) IP2H |= PTKSUH, IP2 |= PTKSU; \
  1122. }while(0)
  1123. // 7 6 5 4 3 2 1 0 Reset Value
  1124. //sfr IP3 = 0xDF; // PPWM4FD PPWM5 PPWM4 PPWM3 PPWM2 PPWM1 PS4 PS3 0000,0000
  1125. #define PPWM4FD 0x80
  1126. #define PPWM5 0x40
  1127. #define PPWM4 0x20
  1128. #define PPWM3 0x10
  1129. #define PPWM2 0x08
  1130. #define PPWM1 0x04
  1131. #define PRTC 0x04
  1132. #define PS4 0x02
  1133. #define PS3 0x01
  1134. // 7 6 5 4 3 2 1 0 Reset Value
  1135. //sfr IP3H = 0xEE; // PPWM4FDH PPWM5H PPWM4H PPWM3H PPWM2H PPWM1H PS4H PS3H 0000,0000
  1136. #define PPWM4FDH 0x80
  1137. #define PPWM5H 0x40
  1138. #define PPWM4H 0x20
  1139. #define PPWM3H 0x10
  1140. #define PPWM2H 0x08
  1141. #define PPWM1H 0x04
  1142. #define PRTCH 0x04
  1143. #define PS4H 0x02
  1144. #define PS3H 0x01
  1145. #ifdef STC8Hxx
  1146. //增强型PWM1中断优先级控制
  1147. #define PWM1_Priority(n) do{if(n == 0) IP2H &= ~PPWM1H, IP2 &= ~PPWM1; \
  1148. if(n == 1) IP2H &= ~PPWM1H, IP2 |= PPWM1; \
  1149. if(n == 2) IP2H |= PPWM1H, IP2 &= ~PPWM1; \
  1150. if(n == 3) IP2H |= PPWM1H, IP2 |= PPWM1; \
  1151. }while(0)
  1152. //增强型PWM2中断优先级控制
  1153. #define PWM2_Priority(n) do{if(n == 0) IP2H &= ~PPWM2H, IP2 &= ~PPWM2; \
  1154. if(n == 1) IP2H &= ~PPWM2H, IP2 |= PPWM2; \
  1155. if(n == 2) IP2H |= PPWM2H, IP2 &= ~PPWM2; \
  1156. if(n == 3) IP2H |= PPWM2H, IP2 |= PPWM2; \
  1157. }while(0)
  1158. //USB中断优先级控制
  1159. #define USB_Priority(n) do{if(n == 0) IP2H &= ~PUSBH, IP2 &= ~PUSB; \
  1160. if(n == 1) IP2H &= ~PUSBH, IP2 |= PUSB; \
  1161. if(n == 2) IP2H |= PUSBH, IP2 &= ~PUSB; \
  1162. if(n == 3) IP2H |= PUSBH, IP2 |= PUSB; \
  1163. }while(0)
  1164. //RTC中断优先级控制
  1165. #define RTC_Priority(n) do{if(n == 0) IP3H &= ~PRTCH, IP3 &= ~PRTC; \
  1166. if(n == 1) IP3H &= ~PRTCH, IP3 |= PRTC; \
  1167. if(n == 2) IP3H |= PRTCH, IP3 &= ~PRTC; \
  1168. if(n == 3) IP3H |= PRTCH, IP3 |= PRTC; \
  1169. }while(0)
  1170. #else
  1171. //增强型PWM1中断优先级控制
  1172. #define PWM1_Priority(n) do{if(n == 0) IP3H &= ~PPWM1H, IP3 &= ~PPWM1; \
  1173. if(n == 1) IP3H &= ~PPWM1H, IP3 |= PPWM1; \
  1174. if(n == 2) IP3H |= PPWM1H, IP3 &= ~PPWM1; \
  1175. if(n == 3) IP3H |= PPWM1H, IP3 |= PPWM1; \
  1176. }while(0)
  1177. //增强型PWM2中断优先级控制
  1178. #define PWM2_Priority(n) do{if(n == 0) IP3H &= ~PPWM2H, IP3 &= ~PPWM2; \
  1179. if(n == 1) IP3H &= ~PPWM2H, IP3 |= PPWM2; \
  1180. if(n == 2) IP3H |= PPWM2H, IP3 &= ~PPWM2; \
  1181. if(n == 3) IP3H |= PPWM2H, IP3 |= PPWM2; \
  1182. }while(0)
  1183. #endif
  1184. //增强型PWM3中断优先级控制
  1185. #define PWM3_Priority(n) do{if(n == 0) IP3H &= ~PPWM3H, IP3 &= ~PPWM3; \
  1186. if(n == 1) IP3H &= ~PPWM3H, IP3 |= PPWM3; \
  1187. if(n == 2) IP3H |= PPWM3H, IP3 &= ~PPWM3; \
  1188. if(n == 3) IP3H |= PPWM3H, IP3 |= PPWM3; \
  1189. }while(0)
  1190. //增强型PWM4中断优先级控制
  1191. #define PWM4_Priority(n) do{if(n == 0) IP3H &= ~PPWM4H, IP3 &= ~PPWM4; \
  1192. if(n == 1) IP3H &= ~PPWM4H, IP3 |= PPWM4; \
  1193. if(n == 2) IP3H |= PPWM4H, IP3 &= ~PPWM4; \
  1194. if(n == 3) IP3H |= PPWM4H, IP3 |= PPWM4; \
  1195. }while(0)
  1196. //增强型PWM5中断优先级控制
  1197. #define PWM5_Priority(n) do{if(n == 0) IP3H &= ~PPWM5H, IP3 &= ~PPWM5; \
  1198. if(n == 1) IP3H &= ~PPWM5H, IP3 |= PPWM5; \
  1199. if(n == 2) IP3H |= PPWM5H, IP3 &= ~PPWM5; \
  1200. if(n == 3) IP3H |= PPWM5H, IP3 |= PPWM5; \
  1201. }while(0)
  1202. //增强型PWM4异常检测中断优先级控制
  1203. #define PWM4FD_Priority(n) do{if(n == 0) IP3H &= ~PPWM4FDH, IP3 &= ~PPWM4FD; \
  1204. if(n == 1) IP3H &= ~PPWM4FDH, IP3 |= PPWM4FD; \
  1205. if(n == 2) IP3H |= PPWM4FDH, IP3 &= ~PPWM4FD; \
  1206. if(n == 3) IP3H |= PPWM4FDH, IP3 |= PPWM4FD; \
  1207. }while(0)
  1208. //串口3中断优先级控制
  1209. #define UART3_Priority(n) do{if(n == 0) IP3H &= ~PS3H, IP3 &= ~PS3; \
  1210. if(n == 1) IP3H &= ~PS3H, IP3 |= PS3; \
  1211. if(n == 2) IP3H |= PS3H, IP3 &= ~PS3; \
  1212. if(n == 3) IP3H |= PS3H, IP3 |= PS3; \
  1213. }while(0)
  1214. //串口4中断优先级控制
  1215. #define UART4_Priority(n) do{if(n == 0) IP3H &= ~PS4H, IP3 &= ~PS4; \
  1216. if(n == 1) IP3H &= ~PS4H, IP3 |= PS4; \
  1217. if(n == 2) IP3H |= PS4H, IP3 &= ~PS4; \
  1218. if(n == 3) IP3H |= PS4H, IP3 |= PS4; \
  1219. }while(0)
  1220. // 7 6 5 4 3 2 1 0 Reset Value
  1221. //sfr IP = 0xB8; //中断优先级低位 PPCA PLVD PADC PS PT1 PX1 PT0 PX0 0000,0000
  1222. //--------
  1223. sbit PPCA = IP^7; //PCA 模块中断优先级
  1224. sbit PLVD = IP^6; //低压监测中断优先级
  1225. sbit PADC = IP^5; //ADC 中断优先级
  1226. sbit PS = IP^4; //串行中断0优先级设定位
  1227. sbit PT1 = IP^3; //定时中断1优先级设定位
  1228. sbit PX1 = IP^2; //外部中断1优先级设定位
  1229. sbit PT0 = IP^1; //定时中断0优先级设定位
  1230. sbit PX0 = IP^0; //外部中断0优先级设定位
  1231. // 7 6 5 4 3 2 1 0 Reset Value
  1232. //sfr IPH = 0xB7; //中断优先级高位 PPCAH PLVDH PADCH PSH PT1H PX1H PT0H PX0H 0000,0000
  1233. #define PPCAH 0x80
  1234. #define PLVDH 0x40
  1235. #define PADCH 0x20
  1236. #define PSH 0x10
  1237. #define PT1H 0x08
  1238. #define PX1H 0x04
  1239. #define PT0H 0x02
  1240. #define PX0H 0x01
  1241. //外部中断0中断优先级控制
  1242. #define INT0_Priority(n) do{if(n == 0) IPH &= ~PX0H, PX0 = 0; \
  1243. if(n == 1) IPH &= ~PX0H, PX0 = 1; \
  1244. if(n == 2) IPH |= PX0H, PX0 = 0; \
  1245. if(n == 3) IPH |= PX0H, PX0 = 1; \
  1246. }while(0)
  1247. //外部中断1中断优先级控制
  1248. #define INT1_Priority(n) do{if(n == 0) IPH &= ~PX1H, PX1 = 0; \
  1249. if(n == 1) IPH &= ~PX1H, PX1 = 1; \
  1250. if(n == 2) IPH |= PX1H, PX1 = 0; \
  1251. if(n == 3) IPH |= PX1H, PX1 = 1; \
  1252. }while(0)
  1253. //定时器0中断优先级控制
  1254. #define Timer0_Priority(n) do{if(n == 0) IPH &= ~PT0H, PT0 = 0; \
  1255. if(n == 1) IPH &= ~PT0H, PT0 = 1; \
  1256. if(n == 2) IPH |= PT0H, PT0 = 0; \
  1257. if(n == 3) IPH |= PT0H, PT0 = 1; \
  1258. }while(0)
  1259. //定时器1中断优先级控制
  1260. #define Timer1_Priority(n) do{if(n == 0) IPH &= ~PT1H, PT1 = 0; \
  1261. if(n == 1) IPH &= ~PT1H, PT1 = 1; \
  1262. if(n == 2) IPH |= PT1H, PT1 = 0; \
  1263. if(n == 3) IPH |= PT1H, PT1 = 1; \
  1264. }while(0)
  1265. //串口1中断优先级控制
  1266. #define UART1_Priority(n) do{if(n == 0) IPH &= ~PSH, PS = 0; \
  1267. if(n == 1) IPH &= ~PSH, PS = 1; \
  1268. if(n == 2) IPH |= PSH, PS = 0; \
  1269. if(n == 3) IPH |= PSH, PS = 1; \
  1270. }while(0)
  1271. //ADC中断优先级控制
  1272. #define ADC_Priority(n) do{if(n == 0) IPH &= ~PADCH, PADC = 0; \
  1273. if(n == 1) IPH &= ~PADCH, PADC = 1; \
  1274. if(n == 2) IPH |= PADCH, PADC = 0; \
  1275. if(n == 3) IPH |= PADCH, PADC = 1; \
  1276. }while(0)
  1277. //低压检测中断优先级控制
  1278. #define LVD_Priority(n) do{if(n == 0) IPH &= ~PLVDH, PADC = 0; \
  1279. if(n == 1) IPH &= ~PLVDH, PADC = 1; \
  1280. if(n == 2) IPH |= PLVDH, PADC = 0; \
  1281. if(n == 3) IPH |= PLVDH, PADC = 1; \
  1282. }while(0)
  1283. //CCP/PCA/PWM中断优先级控制
  1284. #define PCA_Priority(n) do{if(n == 0) IPH &= ~PPCAH, PPCA = 0; \
  1285. if(n == 1) IPH &= ~PPCAH, PPCA = 1; \
  1286. if(n == 2) IPH |= PPCAH, PPCA = 0; \
  1287. if(n == 3) IPH |= PPCAH, PPCA = 1; \
  1288. }while(0)
  1289. //#define PCA_InterruptFirst() PPCA = 1
  1290. //#define LVD_InterruptFirst() PLVD = 1
  1291. //#define ADC_InterruptFirst() PADC = 1
  1292. //#define UART1_InterruptFirst() PS = 1
  1293. //#define Timer1_InterruptFirst() PT1 = 1
  1294. //#define INT1_InterruptFirst() PX1 = 1
  1295. //#define Timer0_InterruptFirst() PT0 = 1
  1296. //#define INT0_InterruptFirst() PX0 = 1
  1297. /*************************************************************************************************/
  1298. // 7 6 5 4 3 2 1 0 Reset Value
  1299. //sfr CMPCR1 = 0xE6; CMPEN CMPIF PIE NIE PIS NIS CMPOE CMPRES 00000000B
  1300. #define CMPEN 0x80 //1: 允许比较器, 0: 禁止,关闭比较器电源
  1301. #define CMPIF 0x40 //比较器中断标志, 包括上升沿或下降沿中断, 软件清0
  1302. #define PIE 0x20 //1: 比较结果由0变1, 产生上升沿中断
  1303. #define NIE 0x10 //1: 比较结果由1变0, 产生下降沿中断
  1304. #define PIS 0x08 //输入正极性选择, 0: 选择内部P3.7做正输入, 1: 由ADC_CHS[3:0]所选择的ADC输入端做正输入.
  1305. #define NIS 0x04 //输入负极性选择, 0: 选择内部BandGap电压BGv做负输入, 1: 选择外部P3.6做输入.
  1306. #define CMPOE 0x02 //1: 允许比较结果输出, 0: 禁止.
  1307. #define CMPRES 0x01 //比较结果, 1: CMP+电平高于CMP-, 0: CMP+电平低于CMP-, 只读
  1308. #define CMP_P_P37 0x00 //输入正极性选择, 0: 选择内部P3.7做正输入
  1309. #define CMP_P_ADC 0x08 //输入正极性选择, 1: 由ADC_CHS[3:0]所选择的ADC输入端做正输入.
  1310. #define CMP_N_GAP 0x00 //输入负极性选择, 0: 选择内部BandGap电压BGv做负输入.
  1311. #define CMP_N_P36 0x04 //输入负极性选择, 1: 选择外部P3.6做输入.
  1312. #define CMPO_P34() P_SW2 &= ~0x08 //结果输出到P3.4.
  1313. #define CMPO_P41() P_SW2 |= 0x08 //结果输出到P4.1.
  1314. // 7 6 5 4 3 2 1 0 Reset Value
  1315. //sfr CMPCR2 = 0xE7; INVCMPO DISFLT LCDTY[5:0] 00001001B
  1316. #define INVCMPO 0x80 //1: 比较器输出IO取反, 0: 不取反
  1317. #define DISFLT 0x40 //1: 关闭0.1uF滤波, 0: 允许
  1318. #define LCDTY 0x00 //0~63, 比较结果变化延时周期数
  1319. /*************************************************************************************************/
  1320. // 7 6 5 4 3 2 1 0 Reset Value
  1321. //sfr SCON = 0x98; SM0 SM1 SM2 REN TB8 RB8 TI RI 00000000B //S1 Control
  1322. #define S1_DoubleRate() PCON |= 0x80
  1323. #define S1_SHIFT() SCON &= 0x3f
  1324. #define S1_8bit() SCON = (SCON & 0x3f) | 0x40
  1325. #define S1_9bit() SCON = (SCON & 0x3f) | 0xc0
  1326. #define S1_RX_Enable() SCON |= 0x10
  1327. #define S1_RX_Disable() SCON &= ~0x10
  1328. #define TI1 TI /* 判断TI1是否发送完成 */
  1329. #define RI1 RI /* 判断RI1是否接收完成 */
  1330. #define SET_TI1() TI = 1 /* 设置TI1(引起中断) */
  1331. #define CLR_TI1() TI = 0 /* 清除TI1 */
  1332. #define CLR_RI1() RI = 0 /* 清除RI1 */
  1333. #define S1TB8_SET() TB8 = 1 /* 设置TB8 */
  1334. #define S1TB8_CLR() TB8 = 0 /* 清除TB8 */
  1335. #define S1_Int_Enable() ES = 1 /* 串口1允许中断 */
  1336. #define S1_Int_Disable() ES = 0 /* 串口1禁止中断 */
  1337. #define S1_BRT_UseTimer1() AUXR &= ~1
  1338. #define S1_BRT_UseTimer2() AUXR |= 1
  1339. #define S1_USE_P30P31() P_SW1 &= ~0xc0 //UART1 使用P30 P31口 默认
  1340. #define S1_USE_P36P37() P_SW1 = (P_SW1 & ~0xc0) | 0x40 //UART1 使用P36 P37口
  1341. #define S1_USE_P16P17() P_SW1 = (P_SW1 & ~0xc0) | 0x80 //UART1 使用P16 P17口
  1342. #define S1_USE_P43P44() P_SW1 |= 0xc0 //UART1 使用P43 P44口
  1343. //#define S1_TXD_RXD_SHORT() PCON2 |= (1<<4) //将TXD与RXD连接中继输出
  1344. //#define S1_TXD_RXD_OPEN() PCON2 &= ~(1<<4) //将TXD与RXD连接中继断开 默认
  1345. // 7 6 5 4 3 2 1 0 Reset Value
  1346. //sfr S2CON = 0x9A; S2SM0 - S2SM2 S2REN S2TB8 S2RB8 S2TI S2RI 00000000B //S2 Control
  1347. #define S2_MODE0() S2CON &= ~(1<<7) /* 串口2模式0,8位UART,波特率 = 定时器2的溢出率 / 4 */
  1348. #define S2_MODE1() S2CON |= (1<<7) /* 串口2模式1,9位UART,波特率 = 定时器2的溢出率 / 4 */
  1349. #define S2_8bit() S2CON &= ~(1<<7) /* 串口2模式0,8位UART,波特率 = 定时器2的溢出率 / 4 */
  1350. #define S2_9bit() S2CON |= (1<<7) /* 串口2模式1,9位UART,波特率 = 定时器2的溢出率 / 4 */
  1351. #define S2_RX_Enable() S2CON |= (1<<4) /* 允许串2接收 */
  1352. #define S2_RX_Disable() S2CON &= ~(1<<4) /* 禁止串2接收 */
  1353. #define TI2 (S2CON & 2) /* 判断TI2是否发送完成 */
  1354. #define RI2 (S2CON & 1) /* 判断RI2是否接收完成 */
  1355. #define SET_TI2() S2CON |= (1<<1) /* 设置TI2(引起中断) */
  1356. #define CLR_TI2() S2CON &= ~(1<<1) /* 清除TI2 */
  1357. #define CLR_RI2() S2CON &= ~1 /* 清除RI2 */
  1358. #define S2TB8_SET() S2CON |= (1<<3) /* 设置TB8 */
  1359. #define S2TB8_CLR() S2CON &= ~(1<<3) /* 清除TB8 */
  1360. #define S2_Int_Enable() IE2 |= 1 /* 串口2允许中断 */
  1361. #define S2_Int_Disable() IE2 &= ~1 /* 串口2禁止中断 */
  1362. #define S2_USE_P10P11() P_SW2 &= ~1 /* UART2 使用P1口 默认 */
  1363. #define S2_USE_P46P47() P_SW2 |= 1 /* UART2 使用P4口 */
  1364. // 7 6 5 4 3 2 1 0 Reset Value
  1365. //sfr S3CON = 0xAC; S3SM0 S3ST3 S3SM2 S3REN S3TB8 S3RB8 S3TI S3RI 00000000B //S3 Control
  1366. #define S3_MODE0() S3CON &= ~(1<<7) /* 串口3模式0,8位UART,波特率 = 定时器的溢出率 / 4 */
  1367. #define S3_MODE1() S3CON |= (1<<7) /* 串口3模式1,9位UART,波特率 = 定时器的溢出率 / 4 */
  1368. #define S3_8bit() S3CON &= ~(1<<7) /* 串口3模式0,8位UART,波特率 = 定时器的溢出率 / 4 */
  1369. #define S3_9bit() S3CON |= (1<<7) /* 串口3模式1,9位UART,波特率 = 定时器的溢出率 / 4 */
  1370. #define S3_RX_Enable() S3CON |= (1<<4) /* 允许串3接收 */
  1371. #define S3_RX_Disable() S3CON &= ~(1<<4) /* 禁止串3接收 */
  1372. #define TI3 (S3CON & 2) != 0 /* 判断TI3是否发送完成 */
  1373. #define RI3 (S3CON & 1) != 0 /* 判断RI3是否接收完成 */
  1374. #define SET_TI3() S3CON |= (1<<1) /* 设置TI3(引起中断) */
  1375. #define CLR_TI3() S3CON &= ~(1<<1) /* 清除TI3 */
  1376. #define CLR_RI3() S3CON &= ~1 /* 清除RI3 */
  1377. #define S3TB8_SET() S3CON |= (1<<3) /* 设置TB8 */
  1378. #define S3TB8_CLR() S3CON &= ~(1<<3) /* 清除TB8 */
  1379. #define S3_Int_Enable() IE2 |= (1<<3) /* 串口3允许中断 */
  1380. #define S3_Int_Disable() IE2 &= ~(1<<3) /* 串口3禁止中断 */
  1381. #define S3_BRT_UseTimer3() S3CON |= (1<<6) /* BRT select Timer3 */
  1382. #define S3_BRT_UseTimer2() S3CON &= ~(1<<6) /* BRT select Timer2 */
  1383. #define S3_USE_P00P01() P_SW2 &= ~2 /* UART3 使用P0口 默认 */
  1384. #define S3_USE_P50P51() P_SW2 |= 2 /* UART3 使用P5口 */
  1385. // 7 6 5 4 3 2 1 0 Reset Value
  1386. //sfr S4CON = 0x84; S4SM0 S4ST4 S4SM2 S4REN S4TB8 S4RB8 S4TI S4RI 00000000B //S4 Control
  1387. #define S4_MODE0() S4CON &= ~(1<<7) /* 串口4模式0,8位UART,波特率 = 定时器的溢出率 / 4 */
  1388. #define S4_MODE1() S4CON |= (1<<7) /* 串口4模式1,9位UART,波特率 = 定时器的溢出率 / 4 */
  1389. #define S4_8bit() S4CON &= ~(1<<7) /* 串口4模式0,8位UART,波特率 = 定时器的溢出率 / 4 */
  1390. #define S4_9bit() S4CON |= (1<<7) /* 串口4模式1,9位UART,波特率 = 定时器的溢出率 / 4 */
  1391. #define S4_RX_Enable() S4CON |= (1<<4) /* 允许串4接收 */
  1392. #define S4_RX_Disable() S4CON &= ~(1<<4) /* 禁止串4接收 */
  1393. #define TI4 (S4CON & 2) != 0 /* 判断TI3是否发送完成 */
  1394. #define RI4 (S4CON & 1) != 0 /* 判断RI3是否接收完成 */
  1395. #define SET_TI4() S4CON |= 2 /* 设置TI3(引起中断) */
  1396. #define CLR_TI4() S4CON &= ~2 /* 清除TI3 */
  1397. #define CLR_RI4() S4CON &= ~1 /* 清除RI3 */
  1398. #define S4TB8_SET() S4CON |= 8 /* 设置TB8 */
  1399. #define S4TB8_CLR() S4CON &= ~8 /* 清除TB8 */
  1400. #define S4_Int_Enable() IE2 |= (1<<4) /* 串口4允许中断 */
  1401. #define S4_Int_Disable() IE2 &= ~(1<<4) /* 串口4禁止中断 */
  1402. #define S4_BRT_UseTimer4() S4CON |= (1<<6) /* BRT select Timer4 */
  1403. #define S4_BRT_UseTimer2() S4CON &= ~(1<<6) /* BRT select Timer2 */
  1404. #define S4_USE_P02P03() P_SW2 &= ~4 /* UART4 使用P0口 默认 */
  1405. #define S4_USE_P52P53() P_SW2 |= 4 /* UART4 使用P5口 */
  1406. /**********************************************************/
  1407. // 7 6 5 4 3 2 1 0 Reset Value
  1408. //sfr AUXR = 0x8E; T0x12 T1x12 UART_M0x6 T2R T2_C/T T2x12 EXTRAM S1ST2 0000,0000 //Auxiliary Register
  1409. #define InternalXdata_Disable() AUXR |= 2 /* 禁止使用内部xdata, 所有访问xdata都是访问外部xdata */
  1410. #define InternalXdata_Enable() AUXR &= ~2 /* 允许使用内部xdata, 当访问的地址在内部xdata范围时, 访问内部的xadta, 当地址超过内部xdata时, 访问外部xdata */
  1411. #define S1_M0x6() AUXR |= (1<<5) /* UART Mode0 Speed is 6x Standard */
  1412. #define S1_M0x1() AUXR &= ~(1<<5) /* default, UART Mode0 Speed is Standard */
  1413. //====================================
  1414. #define Timer0_16bitAutoReload() TMOD &= ~0x03 /* 16位自动重装 */
  1415. #define Timer0_16bit() TMOD = (TMOD & ~0x03) | 0x01 /* 16位 */
  1416. #define Timer0_8bitAutoReload() TMOD = (TMOD & ~0x03) | 0x02 /* 8位自动重装 */
  1417. #define Timer0_16bitAutoRL_NoMask() TMOD |= 0x03 /* 16位自动重装不可屏蔽中断 */
  1418. #define Timer0_Run() TR0 = 1 /* 允许定时器0计数 */
  1419. #define Timer0_Stop() TR0 = 0 /* 禁止定时器0计数 */
  1420. #define Timer0_Gate_INT0_P32() TMOD |= (1<<3) /* 时器0由外部INT0高电平允许定时计数 */
  1421. #define Timer0_AsTimer() TMOD &= ~(1<<2) /* 时器0用做定时器 */
  1422. #define Timer0_AsCounter() TMOD |= (1<<2) /* 时器0用做计数器 */
  1423. #define Timer0_AsCounterP34() TMOD |= (1<<2) /* 时器0用做计数器 */
  1424. #define Timer0_1T() AUXR |= (1<<7) /* Timer0 clodk = fo */
  1425. #define Timer0_12T() AUXR &= ~(1<<7) /* Timer0 clodk = fo/12 12分频, default */
  1426. #define Timer0_CLKO_Enable() INT_CLKO |= 1 /* 允许 T0 溢出脉冲在T0(P3.5)脚输出,Fck0 = 1/2 T0 溢出率,T0可以1T或12T。 */
  1427. #define Timer0_CLKO_Disable() INT_CLKO &= ~1
  1428. #define Timer0_CLKO_Enable_P34() INT_CLKO |= 1 /* 允许 T0 溢出脉冲在T0(P3.5)脚输出,Fck0 = 1/2 T0 溢出率,T0可以1T或12T。 */
  1429. #define Timer0_CLKO_Disable_P34() INT_CLKO &= ~1
  1430. #define Timer0_InterruptEnable() ET0 = 1 /* 允许Timer1中断.*/
  1431. #define Timer0_InterruptDisable() ET0 = 0 /* 禁止Timer1中断.*/
  1432. #define T0_Load(n) TH0 = (n) / 256, TL0 = (n) % 256
  1433. #define T0_Load_us_1T(n) Timer0_AsTimer(),Timer0_1T(), Timer0_16bitAutoReload(),TH0=(65536-((MAIN_Fosc/1000)*(n))/1000)/256, TL0=(65536-((MAIN_Fosc/1000)*(n))/1000)%256
  1434. #define T0_Load_us_12T(n) Timer0_AsTimer(),Timer0_12T(),Timer0_16bitAutoReload(),TH0=(65536-((MAIN_Fosc/12000)*(n))/1000)/256,TL0=(65536-((MAIN_Fosc/12000)*(n))/1000)%256
  1435. #define T0_Frequency_1T_P35(n) ET0=0,Timer0_AsTimer(),Timer0_1T(),Timer0_16bitAutoReload(),TH0=(65536-(n/2+MAIN_Fosc/2)/(n))/256,TL0=(65536-(n/2+MAIN_Fosc/2)/(n))%256,INT_CLKO |= bit0,TR0=1 /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1436. #define T0_Frequency_12T_P35(n) ET0=0,Timer0_AsTimer(),Timer0_12T(),Timer0_16bitAutoReload(),TH0=(65536-(n/2+MAIN_Fosc/24)/(n))/256,TL0=(65536-(n/2+MAIN_Fosc/24)/(n))%256,INT_CLKO |= bit0,TR0=1 /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1437. //====================================
  1438. #define Timer1_16bitAutoReload() TMOD &= ~0x30 /* 16位自动重装 */
  1439. #define Timer1_16bit() TMOD = (TMOD & ~0x30) | 0x10 /* 16位 */
  1440. #define Timer1_8bitAutoReload() TMOD = (TMOD & ~0x30) | 0x20 /* 8位自动重装 */
  1441. #define Timer1_Run() TR1 = 1 /* 允许定时器1计数 */
  1442. #define Timer1_Stop() TR1 = 0 /* 禁止定时器1计数 */
  1443. #define Timer1_Gate_INT1_P33() TMOD |= (1<<7) /* 时器1由外部INT1高电平允许定时计数 */
  1444. #define Timer1_AsTimer() TMOD &= ~(1<<6) /* 时器1用做定时器 */
  1445. #define Timer1_AsCounter() TMOD |= (1<<6) /* 时器1用做计数器 */
  1446. #define Timer1_AsCounterP35() TMOD |= (1<<6) /* 时器1用做计数器 */
  1447. #define Timer1_1T() AUXR |= (1<<6) /* Timer1 clodk = fo */
  1448. #define Timer1_12T() AUXR &= ~(1<<6) /* Timer1 clodk = fo/12 12分频, default */
  1449. #define Timer1_CLKO_Enable() INT_CLKO |= 2 /* 允许 T1 溢出脉冲在T1(P3.4)脚输出,Fck1 = 1/2 T1 溢出率,T1可以1T或12T。 */
  1450. #define Timer1_CLKO_Disable() INT_CLKO &= ~2
  1451. #define Timer1_CLKO_Enable_P35() INT_CLKO |= 2 /* 允许 T1 溢出脉冲在T1(P3.4)脚输出,Fck1 = 1/2 T1 溢出率,T1可以1T或12T。 */
  1452. #define Timer1_CLKO_Disable_P35() INT_CLKO &= ~2
  1453. #define Timer1_InterruptEnable() ET1 = 1 /* 允许Timer1中断. */
  1454. #define Timer1_InterruptDisable() ET1 = 0 /* 禁止Timer1中断. */
  1455. #define T1_Load(n) TH1 = (n) / 256, TL1 = (n) % 256
  1456. #define T1_Load_us_1T(n) Timer1_AsTimer(),Timer1_1T(), Timer1_16bitAutoReload(),TH1=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)/256, TL1=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)%256
  1457. #define T1_Load_us_12T(n) Timer1_AsTimer(),Timer1_12T(),Timer1_16bitAutoReload(),TH1=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)/256,TL1=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)%256
  1458. #define T1_Frequency_1T_P34(n) ET1=0,Timer1_AsTimer(),Timer1_1T(),Timer1_16bitAutoReload(),TH1=(65536-(n/2+MAIN_Fosc/2)/(n))/256,TL1=(65536-(n/2+MAIN_Fosc/2)/(n))%256,INT_CLKO |= bit1,TR1=1 /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1459. #define T1_Frequency_12T_P34(n) ET1=0,Timer1_AsTimer(),Timer1_12T(),Timer1_16bitAutoReload(),TH1=(65536-(n/2+MAIN_Fosc/24)/(n))/256,TL1=(65536-(n/2+MAIN_Fosc/24)/(n))%256,INT_CLKO |= bit1,TR1=1 /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1460. //====================================
  1461. #define Timer2_Run() AUXR |= (1<<4) /* 允许定时器2计数 */
  1462. #define Timer2_Stop() AUXR &= ~(1<<4) /* 禁止定时器2计数 */
  1463. #define Timer2_AsTimer() AUXR &= ~(1<<3) /* 时器2用做定时器 */
  1464. #define Timer2_AsCounter() AUXR |= (1<<3) /* 时器2用做计数器 */
  1465. #define Timer2_AsCounterP31() AUXR |= (1<<3) /* 时器2用做计数器 */
  1466. #define Timer2_1T() AUXR |= (1<<2) /* Timer0 clock = fo */
  1467. #define Timer2_12T() AUXR &= ~(1<<2) /* Timer0 clock = fo/12 12分频, default */
  1468. #define Timer2_CLKO_Enable() INT_CLKO |= 4 /* 允许 T2 溢出脉冲在P1.3脚输出,Fck2 = 1/2 T2 溢出率,T2可以1T或12T。 */
  1469. #define Timer2_CLKO_Disable() INT_CLKO &= ~4
  1470. #define Timer2_CLKO_Enable_P13() INT_CLKO |= 4 /* 允许 T2 溢出脉冲在P1.3脚输出,Fck2 = 1/2 T2 溢出率,T2可以1T或12T。 */
  1471. #define Timer2_CLKO_Disable_P13() INT_CLKO &= ~4
  1472. #define Timer2_InterruptEnable() IE2 |= (1<<2) /* 允许Timer2中断. */
  1473. #define Timer2_InterruptDisable() IE2 &= ~(1<<2) /* 禁止Timer2中断. */
  1474. #define T2_Load(n) TH2 = (n) / 256, TL2 = (n) % 256
  1475. #define T2_Load_us_1T(n) Timer2_AsTimer(),Timer2_1T(), TH2=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)/256, TL2=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)%256
  1476. #define T2_Load_us_12T(n) Timer2_AsTimer(),Timer2_12T(),TH2=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)/256,TL2=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)%256
  1477. #define T2_Frequency_1T_P30(n) Timer2_InterruptDisable(),Timer2_AsTimer(),Timer2_1T(), TH2=(65536-(n/2+MAIN_Fosc/2)/(n))/256, TL2=(65536-(n/2+MAIN_Fosc/2)/(n))%256, Timer2_CLKO_Enable_P30(),Timer2_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1478. #define T2_Frequency_12T_P30(n) Timer2_InterruptDisable(),Timer2_AsTimer(),Timer2_12T(),TH2=(65536-(n/2+MAIN_Fosc/24)/(n))/256,TL2=(65536-(n/2+MAIN_Fosc/24)/(n))%256,Timer2_CLKO_Enable_P30(),Timer2_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1479. //====================================
  1480. #define Timer3_Run() T4T3M |= (1<<3) /* 允许定时器3计数 */
  1481. #define Timer3_Stop() T4T3M &= ~(1<<3) /* 禁止定时器3计数 */
  1482. #define Timer3_AsTimer() T4T3M &= ~(1<<2) /* 时器3用做定时器 */
  1483. #define Timer3_AsCounter() T4T3M |= (1<<2) /* 时器3用做计数器, P0.5为外部脉冲 */
  1484. #define Timer3_AsCounterP05() T4T3M |= (1<<2) /* 时器3用做计数器, P0.5为外部脉冲 */
  1485. #define Timer3_1T() T4T3M |= (1<<1) /* 1T模式 */
  1486. #define Timer3_12T() T4T3M &= ~(1<<1) /* 12T模式, default */
  1487. #define Timer3_CLKO_Enable() T4T3M |= 1 /* 允许T3溢出脉冲在T3(P0.4)脚输出,Fck = 1/2 T2 溢出率,T2可以1T或12T。 */
  1488. #define Timer3_CLKO_Disable() T4T3M &= ~1 /* 禁止T3溢出脉冲在T3(P0.4)脚输出 */
  1489. #define Timer3_CLKO_Enable_P04() T4T3M |= 1 /* 允许T3溢出脉冲在T3(P0.4)脚输出,Fck = 1/2 T2 溢出率,T2可以1T或12T。 */
  1490. #define Timer3_CLKO_Disable_P04() T4T3M &= ~1 /* 禁止T3溢出脉冲在T3(P0.4)脚输出 */
  1491. #define Timer3_InterruptEnable() IE2 |= (1<<5) /* 允许Timer3中断. */
  1492. #define Timer3_InterruptDisable() IE2 &= ~(1<<5) /* 禁止Timer3中断. */
  1493. #define T3_Load(n) TH3 = (n) / 256, TL3 = (n) % 256
  1494. #define T3_Load_us_1T(n) Timer3_AsTimer(),Timer3_1T(), TH3=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)/256, TL3=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)%256
  1495. #define T3_Load_us_12T(n) Timer3_AsTimer(),Timer3_12T(),TH3=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)/256,TL3=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)%256
  1496. #define T3_Frequency_1T_P04(n) Timer3_InterruptDisable(),Timer3_AsTimer(),Timer3_1T(), TH3=(65536-(n/2+MAIN_Fosc/2)/(n))/256, TL3=(65536-(n/2+MAIN_Fosc/2)/(n))%256, Timer3_CLKO_P04_Enable,Timer3_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1497. #define T3_Frequency_12T_P04(n) Timer3_InterruptDisable(),Timer3_AsTimer(),Timer3_12T(),TH3=(65536-(n/2+MAIN_Fosc/24)/(n))/256,TL3=(65536-(n/2+MAIN_Fosc/24)/(n))%256,Timer3_CLKO_P04_Enable,Timer3_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1498. //====================================
  1499. #define Timer4_Run() T4T3M |= (1<<7) /* 允许定时器4计数 */
  1500. #define Timer4_Stop() T4T3M &= ~(1<<7) /* 禁止定时器4计数 */
  1501. #define Timer4_AsTimer() T4T3M &= ~(1<<6) /* 时器4用做定时器 */
  1502. #define Timer4_AsCounter() T4T3M |= (1<<6) /* 时器4用做计数器, P0.7为外部脉冲 */
  1503. #define Timer4_AsCounterP07() T4T3M |= (1<<6) /* 时器4用做计数器, P0.7为外部脉冲 */
  1504. #define Timer4_1T() T4T3M |= (1<<5) /* 1T模式 */
  1505. #define Timer4_12T() T4T3M &= ~(1<<5) /* 12T模式, default */
  1506. #define Timer4_CLKO_Enable() T4T3M |= (1<<4) /* 允许T4溢出脉冲在T4(P0.6)脚输出,Fck = 1/2 T2 溢出率,T2可以1T或12T。 */
  1507. #define Timer4_CLKO_Disable() T4T3M &= ~(1<<4) /* 禁止T4溢出脉冲在T4(P0.6)脚输出 */
  1508. #define Timer4_CLKO_Enable_P06() T4T3M |= (1<<4) /* 允许T4溢出脉冲在T4(P0.6)脚输出,Fck = 1/2 T2 溢出率,T2可以1T或12T。 */
  1509. #define Timer4_CLKO_Disable_P06() T4T3M &= ~(1<<4) /* 禁止T4溢出脉冲在T4(P0.6)脚输出 */
  1510. #define Timer4_InterruptEnable() IE2 |= (1<<6) /* 允许Timer4中断. */
  1511. #define Timer4_InterruptDisable() IE2 &= ~(1<<6) /* 禁止Timer4中断. */
  1512. #define T4_Load(n) TH4 = (n) / 256, TL4 = (n) % 256
  1513. #define T4_Load_us_1T(n) Timer4_AsTimer(),Timer4_1T(), TH4=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)/256, TL4=(65536-((MAIN_Fosc/1000)*(n)+500)/1000)%256
  1514. #define T4_Load_us_12T(n) Timer4_AsTimer(),Timer4_12T(),TH4=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)/256,TL4=(65536-((MAIN_Fosc/12000)*(n)+500)/1000)%256
  1515. #define T4_Frequency_1T_P06(n) Timer4_InterruptDisable(),Timer4_AsTimer(),Timer4_1T(), TH4=(65536-(n/2+MAIN_Fosc/2)/(n))/256, TL4=(65536-(n/2+MAIN_Fosc/2)/(n))%256, Timer4_CLKO_P06_Enable(),Timer4_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1516. #define T4_Frequency_12T_P06(n) Timer4_InterruptDisable(),Timer4_AsTimer(),Timer4_12T(),TH4=(65536-(n/2+MAIN_Fosc/24)/(n))/256,TL4=(65536-(n/2+MAIN_Fosc/24)/(n))%256,Timer4_CLKO_P06_Enable(),Timer4_Run() /* fx=fosc/(2*M)/n, M=1 or M=12 */
  1517. //====================================================================================================================
  1518. //sfr WDT_CONTR = 0xC1; //Watch-Dog-Timer Control register
  1519. // 7 6 5 4 3 2 1 0 Reset Value
  1520. // WDT_FLAG - EN_WDT CLR_WDT IDLE_WDT PS2 PS1 PS0 xx00,0000
  1521. #define D_WDT_FLAG (1<<7)
  1522. #define D_EN_WDT (1<<5)
  1523. #define D_CLR_WDT (1<<4) /* auto clear */
  1524. #define D_IDLE_WDT (1<<3) /* WDT counter when Idle */
  1525. #define D_WDT_SCALE_2 0
  1526. #define D_WDT_SCALE_4 1
  1527. #define D_WDT_SCALE_8 2 /* T=393216*N/fo */
  1528. #define D_WDT_SCALE_16 3
  1529. #define D_WDT_SCALE_32 4
  1530. #define D_WDT_SCALE_64 5
  1531. #define D_WDT_SCALE_128 6
  1532. #define D_WDT_SCALE_256 7
  1533. #define WDT_PS_Set(n) WDT_CONTR = (WDT_CONTR & ~0x07) | (n & 0x07) /* 看门狗定时器时钟分频系数设置 */
  1534. #define WDT_reset(n) WDT_CONTR = D_EN_WDT + D_CLR_WDT + D_IDLE_WDT + (n) /* 初始化WDT,喂狗 */
  1535. // 7 6 5 4 3 2 1 0 Reset Value
  1536. //sfr PCON = 0x87; SMOD SMOD0 LVDF POF GF1 GF0 PD IDL 0001,0000 //Power Control
  1537. //SMOD //串口双倍速
  1538. //SMOD0
  1539. #define LVDF (1<<5) /* P4.6低压检测标志 */
  1540. //POF
  1541. //GF1
  1542. //GF0
  1543. //#define D_PD 2 /* set 1, power down mode */
  1544. //#define D_IDLE 1 /* set 1, idle mode */
  1545. #define MCU_IDLE() PCON |= 1 /* MCU 进入 IDLE 模式 */
  1546. #define MCU_POWER_DOWN() PCON |= 2 /* MCU 进入 睡眠 模式 */
  1547. //sfr IAP_CMD = 0xC5;
  1548. #define IAP_STANDBY() IAP_CMD = 0 //IAP空闲命令(禁止)
  1549. #define IAP_READ() IAP_CMD = 1 //IAP读出命令
  1550. #define IAP_WRITE() IAP_CMD = 2 //IAP写入命令
  1551. #define IAP_ERASE() IAP_CMD = 3 //IAP擦除命令
  1552. //sfr IAP_TRIG = 0xC6;
  1553. #define IAP_TRIG() IAP_TRIG = 0x5A, IAP_TRIG = 0xA5 /* IAP触发命令 */
  1554. // 7 6 5 4 3 2 1 0 Reset Value
  1555. //sfr IAP_CONTR = 0xC7; IAPEN SWBS SWRST CFAIL - - - - 0000,x000 //IAP Control Register
  1556. #define IAP_EN (1<<7)
  1557. #define IAP_SWBS (1<<6)
  1558. #define IAP_SWRST (1<<5)
  1559. #define IAP_CMD_FAIL (1<<4)
  1560. #define IAP_ENABLE() IAP_CONTR = IAP_EN; IAP_TPS = MAIN_Fosc / 1000000
  1561. #define IAP_DISABLE() IAP_CONTR = 0; IAP_CMD = 0; IAP_TRIG = 0; IAP_ADDRH = 0xff; IAP_ADDRL = 0xff
  1562. /* ADC Register */
  1563. // 7 6 5 4 3 2 1 0 Reset Value
  1564. //sfr ADC_CONTR = 0xBC; ADC_POWER SPEED1 SPEED0 ADC_FLAG ADC_START CHS2 CHS1 CHS0 0000,0000 /* AD 转换控制寄存器 */
  1565. //sfr ADC_RES = 0xBD; ADCV.9 ADCV.8 ADCV.7 ADCV.6 ADCV.5 ADCV.4 ADCV.3 ADCV.2 0000,0000 /* A/D 转换结果高8位 */
  1566. //sfr ADC_RESL = 0xBE; ADCV.1 ADCV.0 0000,0000 /* A/D 转换结果低2位 */
  1567. //sfr ADC_CONTR = 0xBC; //直接用MOV操作,不要用与或
  1568. //sfr SPCTL = 0xCE; SPI控制寄存器
  1569. // 7 6 5 4 3 2 1 0 Reset Value
  1570. // SSIG SPEN DORD MSTR CPOL CPHA SPR1 SPR0 0x00
  1571. #define SPI_SSIG_None() SPCTL |= (1<<7) /* 1: 忽略SS脚 */
  1572. #define SPI_SSIG_Enable() SPCTL &= ~(1<<7) /* 0: SS脚用于决定主从机 */
  1573. #define SPI_Enable() SPCTL |= (1<<6) /* 1: 允许SPI */
  1574. #define SPI_Disable() SPCTL &= ~(1<<6) /* 0: 禁止SPI */
  1575. #define SPI_LSB_First() SPCTL |= (1<<5) /* 1: LSB先发 */
  1576. #define SPI_MSB_First() SPCTL &= ~(1<<5) /* 0: MSB先发 */
  1577. #define SPI_Master() SPCTL |= (1<<4) /* 1: 设为主机 */
  1578. #define SPI_Slave() SPCTL &= ~(1<<4) /* 0: 设为从机 */
  1579. #define SPI_SCLK_NormalH() SPCTL |= (1<<3) /* 1: 空闲时SCLK为高电平 */
  1580. #define SPI_SCLK_NormalL() SPCTL &= ~(1<<3) /* 0: 空闲时SCLK为低电平 */
  1581. #define SPI_PhaseH() SPCTL |= (1<<2) /* 1: */
  1582. #define SPI_PhaseL() SPCTL &= ~(1<<2) /* 0: */
  1583. #define SPI_Speed(n) SPCTL = (SPCTL & ~3) | (n) /*设置速度, 0 -- fosc/4, 1 -- fosc/8, 2 -- fosc/16, 3 -- fosc/32 */
  1584. //sfr SPDAT = 0xCF; //SPI Data Register 0000,0000
  1585. //sfr SPSTAT = 0xCD; //SPI状态寄存器
  1586. // 7 6 5 4 3 2 1 0 Reset Value
  1587. // SPIF WCOL - - - - - -
  1588. #define SPIF 0x80 /* SPI传输完成标志。写入1清0。*/
  1589. #define WCOL 0x40 /* SPI写冲突标志。写入1清0。 */
  1590. #define SPI_USE_P12P13P14P15() P_SW1 &= ~0x0c /* 将SPI切换到P12(SS) P13(MOSI) P14(MISO) P15(SCLK)(上电默认)。*/
  1591. #define SPI_USE_P22P23P24P25() P_SW1 = (P_SW1 & ~0x0c) | 0x04 /* 将SPI切换到P22(SS) P23(MOSI) P24(MISO) P25(SCLK)。*/
  1592. #define SPI_USE_P74P75P76P77() P_SW1 = (P_SW1 & ~0x0c) | 0x08 /* 将SPI切换到P74(SS) P75(MOSI) P76(MISO) P77(SCLK)。*/
  1593. #define SPI_USE_P35P34P33P32() P_SW1 = P_SW1 | 0x0C /* 将SPI切换到P35(SS) P34(MOSI) P33(MISO) P32(SCLK)。*/
  1594. // 7 6 5 4 3 2 1 0 Reset Value
  1595. //sfr I2CCFG = 0xFE80H; ENI2C MSSL MSSPEED[5:0] 0000,0000 /* I2C配置寄存器 */
  1596. #define I2C_Function(n) (n==0?(I2CCFG &= ~0x80):(I2CCFG |= 0x80)) //0:禁止 I2C 功能;1:使能 I2C 功能
  1597. #define I2C_ENABLE() I2CCFG |= 0x80 /* 使能 I2C 功能 */
  1598. #define I2C_DISABLE() I2CCFG &= ~0x80 /* 禁止 I2C 功能 */
  1599. #define I2C_Master() I2CCFG |= 0x40 /* 1: 设为主机 */
  1600. #define I2C_Slave() I2CCFG &= ~0x40 /* 0: 设为从机 */
  1601. #define I2C_SetSpeed(n) I2CCFG = (I2CCFG & ~0x3f) | (n & 0x3f) /* 总线速度=Fosc/2/(Speed*2+4) */
  1602. // 7 6 5 4 3 2 1 0 Reset Value
  1603. //sfr I2CMSCR = 0xFE81H; EMSI - - - MSCMD[3:0] 0000,0000 /* I2C配置寄存器 */
  1604. #define I2C_Master_Inturrupt(n) (n==0?(I2CMSCR &= ~0x80):(I2CMSCR |= 0x80)) //0:禁止 I2C 功能;1:使能 I2C 功能
  1605. #define I2C_CMD_None 0
  1606. #define I2C_CMD_Start 1
  1607. #define I2C_CMD_Send 2
  1608. #define I2C_CMD_RACK 3
  1609. #define I2C_CMD_Read 4
  1610. #define I2C_CMD_SACK 5
  1611. #define I2C_CMD_Stop 6
  1612. #define I2C_CMD_RFU1 7
  1613. #define I2C_CMD_RFU2 8
  1614. #define I2C_CMD_Start_Send_RACK 9
  1615. #define I2C_CMD_Send_RACK 10
  1616. #define I2C_CMD_Read_SACK 11
  1617. #define I2C_CMD_Read_SNAK 12
  1618. #define I2C_Command(n) I2CMSCR = (I2CMSCR & ~0x0f) | (n & 0x0f) /* 主机命令 */
  1619. // 7 6 5 4 3 2 1 0 Reset Value
  1620. //sfr I2CMSST = 0xFE82H; MSBUSY MSIF - - - - MSACKI MSACKO 0000,0000 /* I2C主机状态寄存器 */
  1621. // 7 6 5 4 3 2 1 0 Reset Value
  1622. //sfr I2CMSAUX = 0xFE88H; - - - - - - - WDTA 0000,0000 /* I2C主机辅助控制寄存器 */
  1623. #define I2C_WDTA_EN() I2CMSAUX |= 0x01 /* 使能自动发送 */
  1624. #define I2C_WDTA_DIS() I2CMSAUX &= ~0x01 /* 禁止自动发送 */
  1625. // 7 6 5 4 3 2 1 0 Reset Value
  1626. //sfr I2CSLCR = 0xFE83H; - ESTAI ERXI ETXI ESTOI - - SLRET 0000,0000 /* I2C从机控制寄存器 */
  1627. #define I2C_ESTAI_EN() I2CSLCR |= 0x40 /* 使能从机接收START信号中断 */
  1628. #define I2C_ESTAI_DIS() I2CSLCR &= ~0x40 /* 禁止从机接收START信号中断 */
  1629. #define I2C_ERXI_EN() I2CSLCR |= 0x20 /* 使能从机接收1字节数据中断 */
  1630. #define I2C_ERXI_DIS() I2CSLCR &= ~0x20 /* 禁止从机接收1字节数据中断 */
  1631. #define I2C_ETXI_EN() I2CSLCR |= 0x10 /* 使能从机发送1字节数据中断 */
  1632. #define I2C_ETXI_DIS() I2CSLCR &= ~0x10 /* 禁止从机发送1字节数据中断 */
  1633. #define I2C_ESTOI_EN() I2CSLCR |= 0x08 /* 使能从机接收STOP信号中断 */
  1634. #define I2C_ESTOI_DIS() I2CSLCR &= ~0x08 /* 禁止从机接收STOP信号中断 */
  1635. #define I2C_SLRET() I2CSLCR |= 0x01 /* 复位从机模式 */
  1636. // 7 6 5 4 3 2 1 0 Reset Value
  1637. //sfr I2CSLST = 0xFE84H; SLBUSY STAIF RXIF TXIF STOIF - SLACKI SLACKO 0000,0000 /* I2C从机状态寄存器 */
  1638. // 7 6 5 4 3 2 1 0 Reset Value
  1639. //sfr I2CSLADR = 0xFE85H; I2CSLADR[7:1] MA 0000,0000 /* I2C从机地址寄存器 */
  1640. #define I2C_Address(n) I2CSLADR = (I2CSLADR & 0x01) | (n << 1) /* 从机地址 */
  1641. #define I2C_MATCH_EN() I2CSLADR &= ~0x01 /* 使能从机地址比较功能,只接受相匹配地址 */
  1642. #define I2C_MATCH_DIS() I2CSLADR |= 0x01 /* 禁止从机地址比较功能,接受所有设备地址 */
  1643. // 7 6 5 4 3 2 1 0 Reset Value
  1644. //sfr PWMA_ENO = 0xFEB1H; ENO4N ENO4P ENO3N ENO3P ENO2N ENO2P ENO1N ENO1P 0000,0000 /* 输出使能寄存器 */
  1645. //sfr PWMB_ENO = 0xFEB5H; - ENO8P - ENO7P - ENO6P - ENO5P 0000,0000 /* 输出使能寄存器 */
  1646. #define PWM1P_OUT_EN() PWMA_ENO |= 0x01 /* 使能 PWM1P 输出 */
  1647. #define PWM1P_OUT_DIS() PWMA_ENO &= ~0x01 /* 禁止 PWM1P 输出 */
  1648. #define PWM1N_OUT_EN() PWMA_ENO |= 0x02 /* 使能 PWM1N 输出 */
  1649. #define PWM1N_OUT_DIS() PWMA_ENO &= ~0x02 /* 禁止 PWM1N 输出 */
  1650. #define PWM2P_OUT_EN() PWMA_ENO |= 0x04 /* 使能 PWM2P 输出 */
  1651. #define PWM2P_OUT_DIS() PWMA_ENO &= ~0x04 /* 禁止 PWM2P 输出 */
  1652. #define PWM2N_OUT_EN() PWMA_ENO |= 0x08 /* 使能 PWM2N 输出 */
  1653. #define PWM2N_OUT_DIS() PWMA_ENO &= ~0x08 /* 禁止 PWM2N 输出 */
  1654. #define PWM3P_OUT_EN() PWMA_ENO |= 0x10 /* 使能 PWM3P 输出 */
  1655. #define PWM3P_OUT_DIS() PWMA_ENO &= ~0x10 /* 禁止 PWM3P 输出 */
  1656. #define PWM3N_OUT_EN() PWMA_ENO |= 0x20 /* 使能 PWM3N 输出 */
  1657. #define PWM3N_OUT_DIS() PWMA_ENO &= ~0x20 /* 禁止 PWM3N 输出 */
  1658. #define PWM4P_OUT_EN() PWMA_ENO |= 0x40 /* 使能 PWM3P 输出 */
  1659. #define PWM4P_OUT_DIS() PWMA_ENO &= ~0x40 /* 禁止 PWM3P 输出 */
  1660. #define PWM4N_OUT_EN() PWMA_ENO |= 0x80 /* 使能 PWM3N 输出 */
  1661. #define PWM4N_OUT_DIS() PWMA_ENO &= ~0x80 /* 禁止 PWM3N 输出 */
  1662. #define PWM5P_OUT_EN() PWMB_ENO |= 0x01 /* 使能 PWM5P 输出 */
  1663. #define PWM5P_OUT_DIS() PWMB_ENO &= ~0x01 /* 禁止 PWM5P 输出 */
  1664. #define PWM6P_OUT_EN() PWMB_ENO |= 0x04 /* 使能 PWM6P 输出 */
  1665. #define PWM6P_OUT_DIS() PWMB_ENO &= ~0x04 /* 禁止 PWM6P 输出 */
  1666. #define PWM7P_OUT_EN() PWMB_ENO |= 0x10 /* 使能 PWM7P 输出 */
  1667. #define PWM7P_OUT_DIS() PWMB_ENO &= ~0x10 /* 禁止 PWM7P 输出 */
  1668. #define PWM8P_OUT_EN() PWMB_ENO |= 0x40 /* 使能 PWM8P 输出 */
  1669. #define PWM8P_OUT_DIS() PWMB_ENO &= ~0x40 /* 禁止 PWM8P 输出 */
  1670. #define PWMA_OutChannelSel(n) PWMA_ENO = n //选择输出通道
  1671. #define PWMB_OutChannelSel(n) PWMB_ENO = n //选择输出通道
  1672. // 7 6 5 4 3 2 1 0 Reset Value
  1673. //sfr PWMA_PS = 0xFEB2H; C4PS1 C4PS0 C3PS1 C3PS0 C2PS1 C2PS0 C1PS1 C1PS0 0000,0000 /* 输出使能寄存器 */
  1674. //sfr PWMB_PS = 0xFEB6H; C8PS1 C8PS0 C7PS1 C7PS0 C6PS1 C6PS0 C5PS1 C5PS0 0000,0000 /* 输出使能寄存器 */
  1675. #define PWM1_USE_P10P11() PWMA_PS = (PWMA_PS & ~0x03) /* PWM 通道 1 输出脚切换到P10(PWM1P) P11(PWM1N) */
  1676. #define PWM1_USE_P20P21() PWMA_PS = (PWMA_PS & ~0x03) | 0x01 /* PWM 通道 1 输出脚切换到P20(PWM1P) P21(PWM1N) */
  1677. #define PWM1_USE_P60P61() PWMA_PS = (PWMA_PS & ~0x03) | 0x02 /* PWM 通道 1 输出脚切换到P60(PWM1P) P61(PWM1N) */
  1678. #define PWM2_USE_P12P13() PWMA_PS = (PWMA_PS & ~0x0C) /* PWM 通道 2 输出脚切换到P12/P54(PWM2P) P13(PWM2N) */
  1679. #define PWM2_USE_P22P23() PWMA_PS = (PWMA_PS & ~0x0C) | 0x04 /* PWM 通道 2 输出脚切换到P22(PWM2P) P23(PWM2N) */
  1680. #define PWM2_USE_P62P63() PWMA_PS = (PWMA_PS & ~0x0C) | 0x08 /* PWM 通道 2 输出脚切换到P62(PWM2P) P63(PWM2N) */
  1681. #define PWM3_USE_P14P15() PWMA_PS = (PWMA_PS & ~0x30) /* PWM 通道 3 输出脚切换到P14(PWM3P) P15(PWM3N) */
  1682. #define PWM3_USE_P24P25() PWMA_PS = (PWMA_PS & ~0x30) | 0x10 /* PWM 通道 3 输出脚切换到P24(PWM3P) P25(PWM3N) */
  1683. #define PWM3_USE_P64P65() PWMA_PS = (PWMA_PS & ~0x30) | 0x20 /* PWM 通道 3 输出脚切换到P64(PWM3P) P65(PWM3N) */
  1684. #define PWM4_USE_P16P17() PWMA_PS = (PWMA_PS & ~0xC0) /* PWM 通道 4 输出脚切换到P16(PWM4P) P17(PWM4N) */
  1685. #define PWM4_USE_P26P27() PWMA_PS = (PWMA_PS & ~0xC0) | 0x40 /* PWM 通道 4 输出脚切换到P26(PWM4P) P27(PWM4N) */
  1686. #define PWM4_USE_P66P67() PWMA_PS = (PWMA_PS & ~0xC0) | 0x80 /* PWM 通道 4 输出脚切换到P66(PWM4P) P67(PWM4N) */
  1687. #define PWM4_USE_P34P33() PWMA_PS = (PWMA_PS | 0xC0) /* PWM 通道 4 输出脚切换到P34(PWM4P) P33(PWM4N) */
  1688. #define PWM5_USE_P20() PWMB_PS = (PWMB_PS & ~0x03) /* PWM 通道 5 输出脚切换到P20(PWM5) */
  1689. #define PWM5_USE_P17() PWMB_PS = (PWMB_PS & ~0x03) | 0x01 /* PWM 通道 5 输出脚切换到P17(PWM5) */
  1690. #define PWM5_USE_P00() PWMB_PS = (PWMB_PS & ~0x03) | 0x02 /* PWM 通道 5 输出脚切换到P00(PWM5) */
  1691. #define PWM5_USE_P74() PWMB_PS = (PWMB_PS | 0x03) /* PWM 通道 5 输出脚切换到P74(PWM5) */
  1692. #define PWM6_USE_P21() PWMB_PS = (PWMB_PS & ~0x0C) /* PWM 通道 6 输出脚切换到P21(PWM6) */
  1693. #define PWM6_USE_P54() PWMB_PS = (PWMB_PS & ~0x0C) | 0x04 /* PWM 通道 6 输出脚切换到P54(PWM6) */
  1694. #define PWM6_USE_P01() PWMB_PS = (PWMB_PS & ~0x0C) | 0x08 /* PWM 通道 6 输出脚切换到P01(PWM6) */
  1695. #define PWM6_USE_P75() PWMB_PS = (PWMB_PS | 0x0C) /* PWM 通道 6 输出脚切换到P75(PWM6) */
  1696. #define PWM7_USE_P22() PWMB_PS = (PWMB_PS & ~0x30) /* PWM 通道 7 输出脚切换到P22(PWM7) */
  1697. #define PWM7_USE_P33() PWMB_PS = (PWMB_PS & ~0x30) | 0x10 /* PWM 通道 7 输出脚切换到P33(PWM7) */
  1698. #define PWM7_USE_P02() PWMB_PS = (PWMB_PS & ~0x30) | 0x20 /* PWM 通道 7 输出脚切换到P02(PWM7) */
  1699. #define PWM7_USE_P76() PWMB_PS = (PWMB_PS | 0x30) /* PWM 通道 7 输出脚切换到P76(PWM7) */
  1700. #define PWM8_USE_P23() PWMB_PS = (PWMB_PS & ~0xC0) /* PWM 通道 8 输出脚切换到P23(PWM8) */
  1701. #define PWM8_USE_P34() PWMB_PS = (PWMB_PS & ~0xC0) | 0x40 /* PWM 通道 8 输出脚切换到P34(PWM8) */
  1702. #define PWM8_USE_P03() PWMB_PS = (PWMB_PS & ~0xC0) | 0x80 /* PWM 通道 8 输出脚切换到P03(PWM8) */
  1703. #define PWM8_USE_P77() PWMB_PS = (PWMB_PS | 0xC0) /* PWM 通道 8 输出脚切换到P77(PWM8) */
  1704. // 7 6 5 4 3 2 1 0 Reset Value
  1705. //sfr PWMA_IOAUX = 0xFEB3H; AUX4N AUX4P AUX3N AUX3P AUX2N AUX2P AUX1N AUX1P 0000,0000 /* 输出附加使能寄存器 */
  1706. //sfr PWMB_IOAUX = 0xFEB7H; - AUX8P - AUX7P - AUX6P - AUX5P 0000,0000 /* 输出附加使能寄存器 */
  1707. #define AUX4N (1<<7)
  1708. #define AUX4P (1<<6)
  1709. #define AUX3N (1<<5)
  1710. #define AUX3P (1<<4)
  1711. #define AUX2N (1<<3)
  1712. #define AUX2P (1<<2)
  1713. #define AUX1N (1<<1)
  1714. #define AUX1P (1)
  1715. #define AUX8P (1<<6)
  1716. #define AUX7P (1<<4)
  1717. #define AUX6P (1<<2)
  1718. #define AUX5P (1)
  1719. // 7 6 5 4 3 2 1 0 Reset Value
  1720. //sfr PWMA_CR1 = 0xFEC0H; ARPEA CMSA1 CMSA0 DIRA OPMA URSA UDISA CENA 0000,0000 /* 控制寄存器 1 */
  1721. //sfr PWMB_CR1 = 0xFEE0H; ARPEB CMSB1 CMSB0 DIRB OPMB URSB UDISB CENB 0000,0000 /* 控制寄存器 1 */
  1722. #define ARPE1 (1<<7)
  1723. #define ARPE2 (1<<7)
  1724. #define PWMA_AlignMode_Edge() PWMA_CR1 = (PWMA_CR1 & ~0x60)
  1725. #define PWMA_AlignMode_Mid1() PWMA_CR1 = (PWMA_CR1 & ~0x60) | 0x20
  1726. #define PWMA_AlignMode_Mid2() PWMA_CR1 = (PWMA_CR1 & ~0x60) | 0x40
  1727. #define PWMA_AlignMode_Mid3() PWMA_CR1 = (PWMA_CR1 | 0x60)
  1728. #define PWMA_DIR_UP() PWMA_CR1 &= ~0x10
  1729. #define PWMA_DIR_DN() PWMA_CR1 |= 0x10
  1730. #define PWMA_OPMA(n) (n==0?(PWMA_CR1 &= ~0x08):(PWMA_CR1 |= 0x08)) //单脉冲模式 0:在发生更新事件时,计数器不停止;1:在发生下一次更新事件时,清除 CEN 位,计数器停止
  1731. #define PWMA_URSA(n) (n==0?(PWMA_CR1 &= ~0x04):(PWMA_CR1 |= 0x04)) //更新请求源
  1732. #define PWMA_UDISA(n) (n==0?(PWMA_CR1 &= ~0x02):(PWMA_CR1 |= 0x02)) //禁止更新 0:产生更新(UEV)事件;1:不产生更新事件
  1733. #define PWMA_CEN_Enable() PWMA_CR1 |= 0x01 //1:使能计数器
  1734. #define PWMA_CEN_Disable() PWMA_CR1 &= ~0x01 //0:禁止计数器
  1735. #define PWMB_AlignMode_Edge() PWMB_CR1 = (PWMB_CR1 & ~0x60)
  1736. #define PWMB_AlignMode_Mid1() PWMB_CR1 = (PWMB_CR1 & ~0x60) | 0x20
  1737. #define PWMB_AlignMode_Mid2() PWMB_CR1 = (PWMB_CR1 & ~0x60) | 0x40
  1738. #define PWMB_AlignMode_Mid3() PWMB_CR1 = (PWMB_CR1 | 0x60)
  1739. #define PWMB_DIR_UP() PWMB_CR1 &= ~0x10
  1740. #define PWMB_DIR_DN() PWMB_CR1 |= 0x10
  1741. #define PWMB_OPMB(n) (n==0?(PWMB_CR1 &= ~0x08):(PWMB_CR1 |= 0x08)) //单脉冲模式 0:在发生更新事件时,计数器不停止;1:在发生下一次更新事件时,清除 CEN 位,计数器停止
  1742. #define PWMB_URSB(n) (n==0?(PWMB_CR1 &= ~0x04):(PWMB_CR1 |= 0x04)) //更新请求源
  1743. #define PWMB_UDISB(n) (n==0?(PWMB_CR1 &= ~0x02):(PWMB_CR1 |= 0x02)) //禁止更新 0:产生更新(UEV)事件;1:不产生更新事件
  1744. #define PWMB_CEN_Enable() PWMB_CR1 |= 0x01 //1:使能计数器
  1745. #define PWMB_CEN_Disable() PWMB_CR1 &= ~0x01 //0:禁止计数器
  1746. // 7 6 5 4 3 2 1 0 Reset Value
  1747. //sfr PWMA_CR2 = 0xFEC1H; TI1S MMSA2 MMSA1 MMSA0 - COMSA - CCPCA 0000,x0x0 /* 控制寄存器 2 */
  1748. //sfr PWMB_CR2 = 0xFEE1H; TI5S MMSB2 MMSB1 MMSB0 - COMSB - CCPCB 0000,x0xx /* 控制寄存器 2 */
  1749. #define PWM1P_TI1() PWMA_CR2 &= ~0x80
  1750. #define PWM1P2P3P_XOR_TI1() PWMA_CR2 |= 0x80
  1751. #define PWM5P_TI2() PWMB_CR2 &= ~0x80
  1752. #define PWM5P6P7P_XOR_TI2() PWMB_CR2 |= 0x80
  1753. #define MMSn_RESET 0 //复位
  1754. #define MMSn_ENABLE 1 //使能
  1755. #define MMSn_UPDATE 2 //更新
  1756. #define MMSn_COMP_TRGO 3 //比较脉冲
  1757. #define MMSn_OC1REF_TRGO 4 //比较
  1758. #define MMSn_OC2REF_TRGO 5 //比较
  1759. #define MMSn_OC3REF_TRGO 6 //比较
  1760. #define MMSn_OC4REF_TRGO 7 //比较
  1761. #define PWMA_MainModeSel(n) PWMA_CR2 = (PWMA_CR2 & ~0x70) | (n<<4) //主模式选择
  1762. #define PWMB_MainModeSel(n) PWMB_CR2 = (PWMB_CR2 & ~0x70) | (n<<4) //主模式选择
  1763. //0:当 CCPC=1 时,只有在 COMG 位置 1 的时候这些控制位才被更新
  1764. //1:当 CCPC=1 时,只有在 COMG 位置 1 或 TRGI 发生上升沿的时候这些控制位才被更新
  1765. #define PWMA_COMSUpdateCtrl(n) PWMA_CR2 = (n==0?(PWMA_CR2 &= ~0x04):(PWMA_CR2 |= 0x04)) //捕获/比较控制位的更新控制选择
  1766. #define PWMB_COMSUpdateCtrl(n) PWMB_CR2 = (n==0?(PWMB_CR2 &= ~0x04):(PWMB_CR2 |= 0x04)) //捕获/比较控制位的更新控制选择
  1767. //0: CCIE, CCINE, CCiP, CCiNP 和 OCIM 位不是预装载的
  1768. //1: CCIE, CCINE, CCiP, CCiNP 和 OCIM 位是预装载的;设置该位后,它们只在设置了 COMG位后被更新。
  1769. #define PWMA_CCPCAPreloaded(n) PWMA_CR2 = (n==0?(PWMA_CR2 &= ~0x01):(PWMA_CR2 |= 0x01)) //捕获/比较预装载控制位(该位只对具有互补输出的通道起作用)
  1770. #define PWMB_CCPCBPreloaded(n) PWMA_CR2 = (n==0?(PWMA_CR2 &= ~0x01):(PWMA_CR2 |= 0x01)) //捕获/比较预装载控制位(该位只对具有互补输出的通道起作用)
  1771. // 7 6 5 4 3 2 1 0 Reset Value
  1772. //sfr PWMA_SMCR = 0xFEC2H; MSMA TSA2 TSA1 TSA0 - SMSA2 SMSA1 SMSA0 0000,x000 /* 从模式控制寄存器 */
  1773. //sfr PWMB_SMCR = 0xFEE2H; MSMB TSB2 TSB1 TSB0 - SMSB2 SMSB1 SMSB0 0000,x000 /* 从模式控制寄存器 */
  1774. #define SMCR_TSn_ITR2 2
  1775. #define SMCR_TSn_EDGE 4
  1776. #define SMCR_TSn_TIMER1 5
  1777. #define SMCR_TSn_TIMER2 6
  1778. #define SMCR_TSn_ETRF 7
  1779. #define PWMA_SMCR_Source(n) PWMA_SMCR = (PWMA_SMCR & ~0x70) | (n<<4) //触发源选择
  1780. #define PWMB_SMCR_Source(n) PWMB_SMCR = (PWMB_SMCR & ~0x70) | (n<<4) //触发源选择
  1781. #define SMCR_SMSA_INSIDE_CLK 0
  1782. #define SMCR_SMSA_ENCODER_M1 1
  1783. #define SMCR_SMSA_ENCODER_M2 2
  1784. #define SMCR_SMSA_ENCODER_M3 3
  1785. #define SMCR_SMSA_RESET 4
  1786. #define SMCR_SMSA_GATE 5
  1787. #define SMCR_SMSA_TRIG 6
  1788. #define SMCR_SMSA_EXT_CLK 7
  1789. #define PWMA_SMCR_SMS(n) PWMA_SMCR = (PWMA_SMCR & ~0x07) | (n & 7) //时钟/触发/从模式选择
  1790. #define PWMB_SMCR_SMS(n) PWMB_SMCR = (PWMB_SMCR & ~0x07) | (n & 7) //时钟/触发/从模式选择
  1791. // 7 6 5 4 3 2 1 0 Reset Value
  1792. //sfr PWMA_ETR = 0xFEC3H; ETP1 ECE1 ETPS11 ETPS10 ETF13 ETF12 ETF11 ETF10 0000,0000 /* 外部触发寄存器 */
  1793. //sfr PWMB_ETR = 0xFEE3H; ETP2 ECE2 ETPS21 ETPS20 ETF23 ETF22 ETF21 ETF20 0000,0000 /* 外部触发寄存器 */
  1794. // 7 6 5 4 3 2 1 0 Reset Value
  1795. //sfr PWMA_IER = 0xFEC4H; BIEA TIEA COMIEA CC4IE CC3IE CC2IE CC1IE UIEA 0000,0000 /* 中断使能寄存器 */
  1796. //sfr PWMB_IER = 0xFEE4H; BIEB TIEB COMIEB CC8IE CC7IE CC6IE CC5IE UIEB 0000,0000 /* 中断使能寄存器 */
  1797. #define PWMA_UIEA_Enable() PWMA_IER |= 0x01 //1:允许更新中断
  1798. #define PWMA_UIEA_Disable() PWMA_IER &= ~0x01 //0:禁止更新中断
  1799. #define PWMA_CC1IE_Enable() PWMA_IER |= 0x02 //1:允许捕获/比较中断
  1800. #define PWMA_CC1IE_Disable() PWMA_IER &= ~0x02 //0:禁止捕获/比较中断
  1801. #define PWMA_CC2IE_Enable() PWMA_IER |= 0x04 //1:允许捕获/比较中断
  1802. #define PWMA_CC2IE_Disable() PWMA_IER &= ~0x04 //0:禁止捕获/比较中断
  1803. #define PWMA_CC3IE_Enable() PWMA_IER |= 0x08 //1:允许捕获/比较中断
  1804. #define PWMA_CC3IE_Disable() PWMA_IER &= ~0x08 //0:禁止捕获/比较中断
  1805. #define PWMA_CC4IE_Enable() PWMA_IER |= 0x10 //1:允许捕获/比较中断
  1806. #define PWMA_CC4IE_Disable() PWMA_IER &= ~0x10 //0:禁止捕获/比较中断
  1807. #define PWMA_COMIEA_Enable() PWMA_IER |= 0x20 //1:允许COM中断
  1808. #define PWMA_COMIEA_Disable() PWMA_IER &= ~0x20 //0:禁止COM中断
  1809. #define PWMA_TIEA_Enable() PWMA_IER |= 0x40 //1:允许触发中断
  1810. #define PWMA_TIEA_Disable() PWMA_IER &= ~0x40 //0:禁止触发中断
  1811. #define PWMA_BIEA_Enable() PWMA_IER |= 0x80 //1:允许刹车中断
  1812. #define PWMA_BIEA_Disable() PWMA_IER &= ~0x80 //0:禁止刹车中断
  1813. // 7 6 5 4 3 2 1 0 Reset Value
  1814. //sfr PWMA_SR1 = 0xFEC5H; BIF1 TIF1 COMIF1 CC4IF CC3IF CC2IF CC1IF UIF1 0000,0000 /* 状态寄存器 1 */
  1815. //sfr PWMB_SR1 = 0xFEE5H; BIF2 TIF2 COMIF2 CC8IF CC7IF CC6IF CC5IF UIF2 0000,0000 /* 状态寄存器 1 */
  1816. #define UIF1 1
  1817. #define CC1IF (1<<1)
  1818. #define CC2IF (1<<2)
  1819. #define CC3IF (1<<3)
  1820. #define CC4IF (1<<4)
  1821. #define COMIF1 (1<<5)
  1822. #define TIF1 (1<<6)
  1823. #define BIF1 (1<<7)
  1824. #define UIF2 1
  1825. #define CC5IF (1<<1)
  1826. #define CC6IF (1<<2)
  1827. #define CC7IF (1<<3)
  1828. #define CC8IF (1<<4)
  1829. #define COMIF2 (1<<5)
  1830. #define TIF2 (1<<6)
  1831. #define BIF2 (1<<7)
  1832. // 7 6 5 4 3 2 1 0 Reset Value
  1833. //sfr PWMA_SR2 = 0xFEC6H; - - - CC4OF CC3OF CC2OF CC1OF - xxx0,000x /* 状态寄存器 2 */
  1834. //sfr PWMB_SR2 = 0xFEE6H; - - - CC8OF CC7OF CC6OF CC5OF - xxx0,000x /* 状态寄存器 2 */
  1835. // 7 6 5 4 3 2 1 0 Reset Value
  1836. //sfr PWMA_EGR = 0xFEC7H; BG1 TG1 COMG1 CC4G CC3G CC2G CC1G UG1 0000,0000 /* 事件产生寄存器 */
  1837. //sfr PWMB_EGR = 0xFEE7H; BG2 TG2 COMG2 CC8G CC7G CC6G CC5G UG2 0000,0000 /* 事件产生寄存器 */
  1838. // 7 6 5 4 3 2 1 0 Reset Value
  1839. //sfr PWMA_CCMR1 = 0xFEC8H; OC1CE OC1M2 OC1M1 OC1M0 OC1PE OC1FE CC1S1 CC1S0 0000,0000 /* 捕获/比较模式寄存器 1 - 通道配置为比较输出模式 */
  1840. //sfr PWMB_CCMR1 = 0xFEE8H; OC5CE OC5M2 OC5M1 OC5M0 OC5PE OC5FE CC5S1 CC5S0 0000,0000 /* 捕获/比较模式寄存器 1 - 通道配置为比较输出模式 */
  1841. #define OCnCE (1<<7)
  1842. #define CCMRn_FREEZE 0x00 //冻结
  1843. #define CCMRn_MATCH_VALID 0x10 //匹配时设置通道 n 的输出为有效电平
  1844. #define CCMRn_MATCH_INVALID 0x20 //匹配时设置通道 n 的输出为无效电平
  1845. #define CCMRn_ROLLOVER 0x30 //翻转
  1846. #define CCMRn_FORCE_INVALID 0x40 //强制为无效电平
  1847. #define CCMRn_FORCE_VALID 0x50 //强制为有效电平
  1848. #define CCMRn_PWM_MODE1 0x60 //PWM 模式 1
  1849. #define CCMRn_PWM_MODE2 0x70 //PWM 模式 2
  1850. #define PWMA_OC1ModeSet(n) PWMA_CCMR1 = (PWMA_CCMR1 & ~0x70) | (n) //输出比较模式设置
  1851. #define PWMB_OC5ModeSet(n) PWMB_CCMR1 = (PWMB_CCMR1 & ~0x70) | (n) //输出比较模式设置
  1852. #define PWMA_OC1_ReloadEnable() PWMA_CCMR1 |= 0x08 //1:开启 OC1PE 输出比较的预装载功能
  1853. #define PWMA_OC1_RelosdDisable() PWMA_CCMR1 &= ~0x08 //0:禁止 OC1PE 输出比较的预装载功能
  1854. #define PWMB_OC5_ReloadEnable() PWMB_CCMR1 |= 0x08 //1:开启 OC5PE 输出比较的预装载功能
  1855. #define PWMB_OC5_RelosdDisable() PWMB_CCMR1 &= ~0x08 //0:禁止 OC5PE 输出比较的预装载功能
  1856. #define PWMA_OC1_FastEnable() PWMA_CCMR1 |= 0x04 //1:开启 OC1FE 输出比较快速功能
  1857. #define PWMA_OC1_FastDisable() PWMA_CCMR1 &= ~0x04 //0:禁止 OC1FE 输出比较快速功能
  1858. #define PWMB_OC5_FastEnable() PWMB_CCMR1 |= 0x04 //1:开启 OC5FE 输出比较快速功能
  1859. #define PWMB_OC5_FastDisable() PWMB_CCMR1 &= ~0x04 //0:禁止 OC5FE 输出比较快速功能
  1860. #define CCAS_OUTPUT 0x00 //输出
  1861. #define CCAS_IUTPUT_TI1FP1 0x01 //输入,IC1/IC2/IC3/IC4 映射在 TI1FP1 上
  1862. #define CCAS_IUTPUT_TI2FP1 0x02 //输入,IC1/IC2/IC3/IC4 映射在 TI2FP1 上
  1863. #define CCAS_IUTPUT_TRC 0x03 //输入,IC1/IC2/IC3/IC4 映射在 TRC 上
  1864. #define CCBS_OUTPUT 0x00 //输出
  1865. #define CCBS_IUTPUT_TI5FP5 0x01 //输入,IC5/IC6/IC7/IC8 映射在 TI5FP5 上
  1866. #define CCBS_IUTPUT_TI6FP5 0x02 //输入,IC5/IC6/IC7/IC8 映射在 TI6FP5 上
  1867. #define CCBS_IUTPUT_TRC 0x03 //输入,IC5/IC6/IC7/IC8 映射在 TRC 上
  1868. #define PWMA_CC1S_Direction(n) PWMA_CCMR1 = (PWMA_CCMR1 & ~0x03) | (n) //捕获/比较 1 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1869. #define PWMB_CC5S_Direction(n) PWMB_CCMR1 = (PWMB_CCMR1 & ~0x03) | (n) //捕获/比较 5 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1870. // 7 6 5 4 3 2 1 0 Reset Value
  1871. //sfr PWMA_CCMR1 = 0xFEC8H; IC1F3 IC1F2 IC1F1 IC1F0 IC1PSC1 IC1PSC0 CC1S1 CC1S0 0000,0000 /* 捕获/比较模式寄存器 1 - 通道配置为捕获输入模式 */
  1872. //sfr PWMB_CCMR1 = 0xFEE8H; IC5F3 IC5F2 IC5F1 IC5F0 IC5PSC1 IC5PSC0 CC5S1 CC5S0 0000,0000 /* 捕获/比较模式寄存器 1 - 通道配置为捕获输入模式 */
  1873. #define ICnF_01_Clock 0
  1874. #define ICnF_02_Clock 1
  1875. #define ICnF_04_Clock 2
  1876. #define ICnF_08_Clock 3
  1877. #define ICnF_12_Clock 4
  1878. #define ICnF_16_Clock 5
  1879. #define ICnF_24_Clock 6
  1880. #define ICnF_32_Clock 7
  1881. #define ICnF_48_Clock 8
  1882. #define ICnF_64_Clock 9
  1883. #define ICnF_80_Clock 10
  1884. #define ICnF_96_Clock 11
  1885. #define ICnF_128_Clock 12
  1886. #define ICnF_160_Clock 13
  1887. #define ICnF_192_Clock 14
  1888. #define ICnF_256_Clock 15
  1889. #define PWMA_IC1F_FilterClock(n) PWMA_CCMR1 = (PWMA_CCMR1 & 0x0F) | (n<<4) //输入捕获 1 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1890. #define PWMB_IC5F_FilterClock(n) PWMB_CCMR1 = (PWMB_CCMR1 & 0x0F) | (n<<4) //输入捕获 5 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1891. #define PWMA_IC1PSC_PrescalerSet(n) PWMA_CCMR1 = (PWMA_CCMR1 & 0xF3) | ((n&3)<<2) //输入/捕获 1 预分频器,0~3
  1892. #define PWMB_IC5PSC_PrescalerSet(n) PWMB_CCMR1 = (PWMB_CCMR1 & 0xF3) | ((n&3)<<2) //输入/捕获 5 预分频器,0~3
  1893. // 7 6 5 4 3 2 1 0 Reset Value
  1894. //sfr PWMA_CCMR2 = 0xFEC9H; OC2CE OC2M2 OC2M1 OC2M0 OC2PE OC2FE CC2S1 CC2S0 0000,0000 /* 捕获/比较模式寄存器 2 - 通道配置为比较输出模式 */
  1895. //sfr PWMB_CCMR2 = 0xFEE9H; OC6CE OC6M2 OC6M1 OC6M0 OC6PE OC6FE CC6S1 CC6S0 0000,0000 /* 捕获/比较模式寄存器 2 - 通道配置为比较输出模式 */
  1896. #define PWMA_OC2ModeSet(n) PWMA_CCMR2 = (PWMA_CCMR2 & ~0x70) | (n) //输出比较模式设置
  1897. #define PWMB_OC6ModeSet(n) PWMB_CCMR2 = (PWMB_CCMR2 & ~0x70) | (n) //输出比较模式设置
  1898. #define PWMA_OC2_ReloadEnable() PWMA_CCMR2 |= 0x08 //1:开启 OC2PE 输出比较的预装载功能
  1899. #define PWMA_OC2_RelosdDisable() PWMA_CCMR2 &= ~0x08 //0:禁止 OC2PE 输出比较的预装载功能
  1900. #define PWMB_OC6_ReloadEnable() PWMB_CCMR2 |= 0x08 //1:开启 OC6PE 输出比较的预装载功能
  1901. #define PWMB_OC6_RelosdDisable() PWMB_CCMR2 &= ~0x08 //0:禁止 OC6PE 输出比较的预装载功能
  1902. #define PWMA_OC2_FastEnable() PWMA_CCMR2 |= 0x04 //1:开启 OC2FE 输出比较快速功能
  1903. #define PWMA_OC2_FastDisable() PWMA_CCMR2 &= ~0x04 //0:禁止 OC2FE 输出比较快速功能
  1904. #define PWMB_OC6_FastEnable() PWMB_CCMR2 |= 0x04 //1:开启 OC6FE 输出比较快速功能
  1905. #define PWMB_OC6_FastDisable() PWMB_CCMR2 &= ~0x04 //0:禁止 OC6FE 输出比较快速功能
  1906. #define PWMA_CC2S_Direction(n) PWMA_CCMR2 = (PWMA_CCMR2 & ~0x03) | (n) //捕获/比较 2 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1907. #define PWMB_CC6S_Direction(n) PWMB_CCMR2 = (PWMB_CCMR2 & ~0x03) | (n) //捕获/比较 6 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1908. // 7 6 5 4 3 2 1 0 Reset Value
  1909. //sfr PWMA_CCMR2 = 0xFEC9H; IC2F3 IC2F2 IC2F1 IC2F0 IC2PSC1 IC2PSC0 CC2S1 CC2S0 0000,0000 /* 捕获/比较模式寄存器 2 - 通道配置为捕获输入模式 */
  1910. //sfr PWMB_CCMR2 = 0xFEE9H; IC6F3 IC6F2 IC6F1 IC6F0 IC6PSC1 IC6PSC0 CC6S1 CC6S0 0000,0000 /* 捕获/比较模式寄存器 2 - 通道配置为捕获输入模式 */
  1911. #define PWMA_IC2F_FilterClock(n) PWMA_CCMR2 = (PWMA_CCMR2 & 0x0F) | (n<<4) //输入捕获 2 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1912. #define PWMB_IC6F_FilterClock(n) PWMB_CCMR2 = (PWMB_CCMR2 & 0x0F) | (n<<4) //输入捕获 6 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1913. #define PWMA_IC2PSC_PrescalerSet(n) PWMA_CCMR2 = (PWMA_CCMR2 & 0xF3) | ((n&3)<<2) //输入/捕获 2 预分频器,0~3
  1914. #define PWMB_IC6PSC_PrescalerSet(n) PWMB_CCMR2 = (PWMB_CCMR2 & 0xF3) | ((n&3)<<2) //输入/捕获 6 预分频器,0~3
  1915. // 7 6 5 4 3 2 1 0 Reset Value
  1916. //sfr PWMA_CCMR3 = 0xFECAH; OC3CE OC3M2 OC3M1 OC3M0 OC3PE OC3FE CC3S1 CC3S0 0000,0000 /* 捕获/比较模式寄存器 3 - 通道配置为比较输出模式 */
  1917. //sfr PWMB_CCMR3 = 0xFEEAH; OC7CE OC7M2 OC7M1 OC7M0 OC7PE OC7FE CC7S1 CC7S0 0000,0000 /* 捕获/比较模式寄存器 3 - 通道配置为比较输出模式 */
  1918. #define PWMA_OC3ModeSet(n) PWMA_CCMR3 = (PWMA_CCMR3 & ~0x70) | (n) //输出比较模式设置
  1919. #define PWMB_OC7ModeSet(n) PWMB_CCMR3 = (PWMB_CCMR3 & ~0x70) | (n) //输出比较模式设置
  1920. #define PWMA_OC3_ReloadEnable() PWMA_CCMR3 |= 0x08 //1:开启 OC3PE 输出比较的预装载功能
  1921. #define PWMA_OC3_RelosdDisable() PWMA_CCMR3 &= ~0x08 //0:禁止 OC3PE 输出比较的预装载功能
  1922. #define PWMB_OC7_ReloadEnable() PWMB_CCMR3 |= 0x08 //1:开启 OC7PE 输出比较的预装载功能
  1923. #define PWMB_OC7_RelosdDisable() PWMB_CCMR3 &= ~0x08 //0:禁止 OC7PE 输出比较的预装载功能
  1924. #define PWMA_OC3_FastEnable() PWMA_CCMR3 |= 0x04 //1:开启 OC3FE 输出比较快速功能
  1925. #define PWMA_OC3_FastDisable() PWMA_CCMR3 &= ~0x04 //0:禁止 OC3FE 输出比较快速功能
  1926. #define PWMB_OC7_FastEnable() PWMB_CCMR3 |= 0x04 //1:开启 OC7FE 输出比较快速功能
  1927. #define PWMB_OC7_FastDisable() PWMB_CCMR3 &= ~0x04 //0:禁止 OC7FE 输出比较快速功能
  1928. #define PWMA_CC3S_Direction(n) PWMA_CCMR3 = (PWMA_CCMR3 & ~0x03) | (n) //捕获/比较 3 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1929. #define PWMB_CC7S_Direction(n) PWMB_CCMR3 = (PWMB_CCMR3 & ~0x03) | (n) //捕获/比较 7 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1930. // 7 6 5 4 3 2 1 0 Reset Value
  1931. //sfr PWMA_CCMR3 = 0xFECAH; IC3F3 IC3F2 IC3F1 IC3F0 IC3PSC1 IC3PSC0 CC3S1 CC3S0 0000,0000 /* 捕获/比较模式寄存器 3 - 通道配置为捕获输入模式 */
  1932. //sfr PWMB_CCMR3 = 0xFEEAH; IC7F3 IC7F2 IC7F1 IC7F0 IC7PSC1 IC7PSC0 CC7S1 CC7S0 0000,0000 /* 捕获/比较模式寄存器 3 - 通道配置为捕获输入模式 */
  1933. #define PWMA_IC3F_FilterClock(n) PWMA_CCMR3 = (PWMA_CCMR3 & 0x0F) | (n<<4) //输入捕获 3 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1934. #define PWMB_IC7F_FilterClock(n) PWMB_CCMR3 = (PWMB_CCMR3 & 0x0F) | (n<<4) //输入捕获 7 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1935. #define PWMA_IC3PSC_PrescalerSet(n) PWMA_CCMR3 = (PWMA_CCMR3 & 0xF3) | ((n&3)<<2) //输入/捕获 3 预分频器,0~3
  1936. #define PWMB_IC7PSC_PrescalerSet(n) PWMB_CCMR3 = (PWMB_CCMR3 & 0xF3) | ((n&3)<<2) //输入/捕获 7 预分频器,0~3
  1937. // 7 6 5 4 3 2 1 0 Reset Value
  1938. //sfr PWMA_CCMR4 = 0xFECBH; OC4CE OC4M2 OC4M1 OC4M0 OC4PE OC4FE CC4S1 CC4S0 0000,0000 /* 捕获/比较模式寄存器 4 - 通道配置为比较输出模式 */
  1939. //sfr PWMB_CCMR4 = 0xFEEBH; OC8CE OC8M2 OC8M1 OC8M0 OC8PE OC8FE CC8S1 CC8S0 0000,0000 /* 捕获/比较模式寄存器 4 - 通道配置为比较输出模式 */
  1940. #define PWMA_OC4ModeSet(n) PWMA_CCMR4 = (PWMA_CCMR4 & ~0x70) | (n) //输出比较模式设置
  1941. #define PWMB_OC8ModeSet(n) PWMB_CCMR4 = (PWMB_CCMR4 & ~0x70) | (n) //输出比较模式设置
  1942. #define PWMA_OC4_ReloadEnable() PWMA_CCMR4 |= 0x08 //1:开启 OC4PE 输出比较的预装载功能
  1943. #define PWMA_OC4_RelosdDisable() PWMA_CCMR4 &= ~0x08 //0:禁止 OC4PE 输出比较的预装载功能
  1944. #define PWMB_OC8_ReloadEnable() PWMB_CCMR4 |= 0x08 //1:开启 OC8PE 输出比较的预装载功能
  1945. #define PWMB_OC8_RelosdDisable() PWMB_CCMR4 &= ~0x08 //0:禁止 OC8PE 输出比较的预装载功能
  1946. #define PWMA_OC4_FastEnable() PWMA_CCMR4 |= 0x04 //1:开启 OC4FE 输出比较快速功能
  1947. #define PWMA_OC4_FastDisable() PWMA_CCMR4 &= ~0x04 //0:禁止 OC4FE 输出比较快速功能
  1948. #define PWMB_OC8_FastEnable() PWMB_CCMR4 |= 0x04 //1:开启 OC8FE 输出比较快速功能
  1949. #define PWMB_OC8_FastDisable() PWMB_CCMR4 &= ~0x04 //0:禁止 OC8FE 输出比较快速功能
  1950. #define PWMA_CC4S_Direction(n) PWMA_CCMR4 = (PWMA_CCMR4 & ~0x03) | (n) //捕获/比较 4 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1951. #define PWMB_CC8S_Direction(n) PWMB_CCMR4 = (PWMB_CCMR4 & ~0x03) | (n) //捕获/比较 8 选择。这两位定义通道的方向(输入/输出),及输入脚的选择
  1952. // 7 6 5 4 3 2 1 0 Reset Value
  1953. //sfr PWMA_CCMR4 = 0xFECBH; IC4F3 IC4F2 IC4F1 IC4F0 IC4PSC1 IC4PSC0 CC4S1 CC4S0 0000,0000 /* 捕获/比较模式寄存器 4 - 通道配置为捕获输入模式 */
  1954. //sfr PWMB_CCMR4 = 0xFEEBH; IC8F3 IC8F2 IC8F1 IC8F0 IC8PSC1 IC8PSC0 CC8S1 CC8S0 0000,0000 /* 捕获/比较模式寄存器 4 - 通道配置为捕获输入模式 */
  1955. #define PWMA_IC4F_FilterClock(n) PWMA_CCMR4 = (PWMA_CCMR4 & 0x0F) | (n<<4) //输入捕获 4 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1956. #define PWMB_IC8F_FilterClock(n) PWMB_CCMR4 = (PWMB_CCMR4 & 0x0F) | (n<<4) //输入捕获 8 滤波器选择,该位域定义了 TIn 的采样频率及数字滤波器长度
  1957. #define PWMA_IC4PSC_PrescalerSet(n) PWMA_CCMR4 = (PWMA_CCMR4 & 0xF3) | ((n&3)<<2) //输入/捕获 4 预分频器,0~3
  1958. #define PWMB_IC8PSC_PrescalerSet(n) PWMB_CCMR4 = (PWMB_CCMR4 & 0xF3) | ((n&3)<<2) //输入/捕获 8 预分频器,0~3
  1959. // 7 6 5 4 3 2 1 0 Reset Value
  1960. //sfr PWMA_CCER1 = 0xFECCH; CC2NP CC2NE CC2P CC2E CC1NP CC1NE CC1P CC1E 0000,0000 /* 捕获/比较使能寄存器 1 */
  1961. //sfr PWMB_CCER1 = 0xFEECH; - - CC6P CC6E - - CC5P CC5E 0000,0000 /* 捕获/比较使能寄存器 1 */
  1962. #define PWMA_CCER1_Disable() PWMA_CCER1 = 0x00 //关闭所有输入捕获/比较输出
  1963. #define PWMA_CC1E_Enable() PWMA_CCER1 |= 0x01 //1:开启输入捕获/比较输出
  1964. #define PWMA_CC1E_Disable() PWMA_CCER1 &= ~0x01 //0:关闭输入捕获/比较输出
  1965. #define PWMA_CC1P_LowValid() PWMA_CCER1 |= 0x02 //1:低电平有效
  1966. #define PWMA_CC1P_HighValid() PWMA_CCER1 &= ~0x02 //0:高电平有效
  1967. #define PWMA_CC1P_CaptureRise() PWMA_CCER1 |= 0x02 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  1968. #define PWMA_CC1P_CaptureFall() PWMA_CCER1 &= ~0x02 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  1969. #define PWMA_CC1NE_Enable() PWMA_CCER1 |= 0x04 //1:开启比较输出
  1970. #define PWMA_CC1NE_Disable() PWMA_CCER1 &= ~0x04 //0:关闭比较输出
  1971. #define PWMA_CC1NP_LowValid() PWMA_CCER1 |= 0x08 //1:低电平有效
  1972. #define PWMA_CC1NP_HighValid() PWMA_CCER1 &= ~0x08 //0:高电平有效
  1973. #define PWMA_CC2E_Enable() PWMA_CCER1 |= 0x10 //1:开启输入捕获/比较输出
  1974. #define PWMA_CC2E_Disable() PWMA_CCER1 &= ~0x10 //0:关闭输入捕获/比较输出
  1975. #define PWMA_CC2P_LowValid() PWMA_CCER1 |= 0x20 //1:低电平有效
  1976. #define PWMA_CC2P_HighValid() PWMA_CCER1 &= ~0x20 //0:高电平有效
  1977. #define PWMA_CC2P_CaptureRise() PWMA_CCER1 |= 0x20 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  1978. #define PWMA_CC2P_CaptureFall() PWMA_CCER1 &= ~0x20 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  1979. #define PWMA_CC2NE_Enable() PWMA_CCER1 |= 0x40 //1:开启比较输出
  1980. #define PWMA_CC2NE_Disable() PWMA_CCER1 &= ~0x40 //0:关闭比较输出
  1981. #define PWMA_CC2NP_LowValid() PWMA_CCER1 |= 0x80 //1:低电平有效
  1982. #define PWMA_CC2NP_HighValid() PWMA_CCER1 &= ~0x80 //0:高电平有效
  1983. #define PWMB_CCER1_Disable() PWMB_CCER1 = 0x00 //关闭所有输入捕获/比较输出
  1984. #define PWMB_CC5E_Enable() PWMB_CCER1 |= 0x01 //1:开启输入捕获/比较输出
  1985. #define PWMB_CC5E_Disable() PWMB_CCER1 &= ~0x01 //0:关闭输入捕获/比较输出
  1986. #define PWMB_CC5P_LowValid() PWMB_CCER1 |= 0x02 //1:低电平有效
  1987. #define PWMB_CC5P_HighValid() PWMB_CCER1 &= ~0x02 //0:高电平有效
  1988. #define PWMB_CC5P_CaptureRise() PWMB_CCER1 |= 0x02 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  1989. #define PWMB_CC5P_CaptureFall() PWMB_CCER1 &= ~0x02 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  1990. #define PWMB_CC6E_Enable() PWMB_CCER1 |= 0x10 //1:开启输入捕获/比较输出
  1991. #define PWMB_CC6E_Disable() PWMB_CCER1 &= ~0x10 //0:关闭输入捕获/比较输出
  1992. #define PWMB_CC6P_LowValid() PWMB_CCER1 |= 0x20 //1:低电平有效
  1993. #define PWMB_CC6P_HighValid() PWMB_CCER1 &= ~0x20 //0:高电平有效
  1994. #define PWMB_CC6P_CaptureRise() PWMB_CCER1 |= 0x20 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  1995. #define PWMB_CC6P_CaptureFall() PWMB_CCER1 &= ~0x20 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  1996. // 7 6 5 4 3 2 1 0 Reset Value
  1997. //sfr PWMA_CCER2 = 0xFECDH; CC4NP CC4NE CC4P CC4E CC3NP CC3NE CC3P CC3E 0000,0000 /* 捕获/比较使能寄存器 2 */
  1998. //sfr PWMB_CCER2 = 0xFEEDH; - - CC8P CC8E - - CC7P CC7E 0000,0000 /* 捕获/比较使能寄存器 2 */
  1999. #define PWMA_CCER2_Disable() PWMA_CCER2 = 0x00 //关闭所有输入捕获/比较输出
  2000. #define PWMA_CC3E_Enable() PWMA_CCER2 |= 0x01 //1:开启输入捕获/比较输出
  2001. #define PWMA_CC3E_Disable() PWMA_CCER2 &= ~0x01 //0:关闭输入捕获/比较输出
  2002. #define PWMA_CC3P_LowValid() PWMA_CCER2 |= 0x02 //1:低电平有效
  2003. #define PWMA_CC3P_HighValid() PWMA_CCER2 &= ~0x02 //0:高电平有效
  2004. #define PWMA_CC3P_CaptureRise() PWMA_CCER2 |= 0x02 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  2005. #define PWMA_CC3P_CaptureFall() PWMA_CCER2 &= ~0x02 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  2006. #define PWMA_CC3NE_Enable() PWMA_CCER2 |= 0x04 //1:开启比较输出
  2007. #define PWMA_CC3NE_Disable() PWMA_CCER2 &= ~0x04 //0:关闭比较输出
  2008. #define PWMA_CC3NP_LowValid() PWMA_CCER2 |= 0x08 //1:低电平有效
  2009. #define PWMA_CC3NP_HighValid() PWMA_CCER2 &= ~0x08 //0:高电平有效
  2010. #define PWMA_CC4E_Enable() PWMA_CCER2 |= 0x10 //1:开启输入捕获/比较输出
  2011. #define PWMA_CC4E_Disable() PWMA_CCER2 &= ~0x10 //0:关闭输入捕获/比较输出
  2012. #define PWMA_CC4P_LowValid() PWMA_CCER2 |= 0x20 //1:低电平有效
  2013. #define PWMA_CC4P_HighValid() PWMA_CCER2 &= ~0x20 //0:高电平有效
  2014. #define PWMA_CC4P_CaptureRise() PWMA_CCER2 |= 0x20 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  2015. #define PWMA_CC4P_CaptureFall() PWMA_CCER2 &= ~0x20 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  2016. #define PWMA_CC4NE_Enable() PWMA_CCER2 |= 0x40 //1:开启比较输出
  2017. #define PWMA_CC4NE_Disable() PWMA_CCER2 &= ~0x40 //0:关闭比较输出
  2018. #define PWMA_CC4NP_LowValid() PWMA_CCER2 |= 0x80 //1:低电平有效
  2019. #define PWMA_CC4NP_HighValid() PWMA_CCER2 &= ~0x80 //0:高电平有效
  2020. #define PWMB_CCER2_Disable() PWMB_CCER2 = 0x00 //关闭所有输入捕获/比较输出
  2021. #define PWMB_CC7E_Enable() PWMB_CCER2 |= 0x01 //1:开启输入捕获/比较输出
  2022. #define PWMB_CC7E_Disable() PWMB_CCER2 &= ~0x01 //0:关闭输入捕获/比较输出
  2023. #define PWMB_CC7P_LowValid() PWMB_CCER2 |= 0x02 //1:低电平有效
  2024. #define PWMB_CC7P_HighValid() PWMB_CCER2 &= ~0x02 //0:高电平有效
  2025. #define PWMB_CC7P_CaptureRise() PWMB_CCER2 |= 0x02 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  2026. #define PWMB_CC7P_CaptureFall() PWMB_CCER2 &= ~0x02 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  2027. #define PWMB_CC8E_Enable() PWMB_CCER2 |= 0x10 //1:开启输入捕获/比较输出
  2028. #define PWMB_CC8E_Disable() PWMB_CCER2 &= ~0x10 //0:关闭输入捕获/比较输出
  2029. #define PWMB_CC8P_LowValid() PWMB_CCER2 |= 0x20 //1:低电平有效
  2030. #define PWMB_CC8P_HighValid() PWMB_CCER2 &= ~0x20 //0:高电平有效
  2031. #define PWMB_CC8P_CaptureRise() PWMB_CCER2 |= 0x20 //1:捕获发生在 TI1F 或 TI2F 的下降沿
  2032. #define PWMB_CC8P_CaptureFall() PWMB_CCER2 &= ~0x20 //0:捕获发生在 TI1F 或 TI2F 的上升沿
  2033. // 7 6 5 4 3 2 1 0 Reset Value
  2034. //sfr PWMA_CNTRH = 0xFECEH; CNT1[15:8] 0000,0000 /* 计数器高 8 位 */
  2035. //sfr PWMB_CNTRH = 0xFEEEH; CNT2[15:8] 0000,0000 /* 计数器高 8 位 */
  2036. //sfr PWMA_CNTRL = 0xFECFH; CNT1[7:0] 0000,0000 /* 计数器低 8 位 */
  2037. //sfr PWMB_CNTRL = 0xFEEFH; CNT2[7:0] 0000,0000 /* 计数器低 8 位 */
  2038. #define PWMA_Counter(n) PWMA_CNTR = n //计数器设置
  2039. #define PWMB_Counter(n) PWMB_CNTR = n //计数器设置
  2040. // 7 6 5 4 3 2 1 0 Reset Value
  2041. //sfr PWMA_PSCRH = 0xFED0H; PSC1[15:8] 0000,0000 /* 预分频器高 8 位 */
  2042. //sfr PWMB_PSCRH = 0xFEF0H; PSC2[15:8] 0000,0000 /* 预分频器高 8 位 */
  2043. //sfr PWMA_PSCRL = 0xFED1H; PSC1[7:0] 0000,0000 /* 预分频器低 8 位 */
  2044. //sfr PWMB_PSCRL = 0xFEF1H; PSC2[7:0] 0000,0000 /* 预分频器低 8 位 */
  2045. #define PWMA_Prescaler(n) PWMA_PSCR = n //预分频器设置
  2046. #define PWMB_Prescaler(n) PWMB_PSCR = n //预分频器设置
  2047. // 7 6 5 4 3 2 1 0 Reset Value
  2048. //sfr PWMA_ARRH = 0xFED2H; ARR1[15:8] 0000,0000 /* 自动重装载寄存器高 8 位 */
  2049. //sfr PWMB_ARRH = 0xFEF2H; ARR2[15:8] 0000,0000 /* 自动重装载寄存器高 8 位 */
  2050. //sfr PWMA_ARRL = 0xFED3H; ARR1[7:0] 0000,0000 /* 自动重装载寄存器低 8 位 */
  2051. //sfr PWMB_ARRL = 0xFEF3H; ARR2[7:0] 0000,0000 /* 自动重装载寄存器低 8 位 */
  2052. #define PWMA_AutoReload(n) PWMA_ARR = n //自动重装载寄存器设置
  2053. #define PWMB_AutoReload(n) PWMB_ARR = n //自动重装载寄存器设置
  2054. // 7 6 5 4 3 2 1 0 Reset Value
  2055. //sfr PWMA_RCR = 0xFED4H; REP1[7:0] 0000,0000 /* 重复计数器寄存器 */
  2056. //sfr PWMB_RCR = 0xFEF4H; REP2[7:0] 0000,0000 /* 重复计数器寄存器 */
  2057. #define PWMA_ReCounter(n) PWMA_RCR = n //重复计数器寄存器设置
  2058. #define PWMB_ReCounter(n) PWMB_RCR = n //重复计数器寄存器设置
  2059. // 7 6 5 4 3 2 1 0 Reset Value
  2060. //sfr PWMA_CCR1H = 0xFED5H; CCR1[15:8] 0000,0000 /* 捕获/比较寄存器 1 高 8 位 */
  2061. //sfr PWMB_CCR5H = 0xFEF5H; CCR5[15:8] 0000,0000 /* 捕获/比较寄存器 1 高 8 位 */
  2062. //sfr PWMA_CCR1L = 0xFED6H; CCR1[7:0] 0000,0000 /* 捕获/比较寄存器 1 低 8 位 */
  2063. //sfr PWMB_CCR5L = 0xFEF6H; CCR5[7:0] 0000,0000 /* 捕获/比较寄存器 1 低 8 位 */
  2064. #define PWMA_Duty1(n) PWMA_CCR1 = n //捕获/比较寄存器 1 设置
  2065. #define PWMB_Duty5(n) PWMB_CCR5 = n //捕获/比较寄存器 1 设置
  2066. // 7 6 5 4 3 2 1 0 Reset Value
  2067. //sfr PWMA_CCR2H = 0xFED7H; CCR2[15:8] 0000,0000 /* 捕获/比较寄存器 2 高 8 位 */
  2068. //sfr PWMB_CCR6H = 0xFEF7H; CCR6[15:8] 0000,0000 /* 捕获/比较寄存器 2 高 8 位 */
  2069. //sfr PWMA_CCR2L = 0xFED8H; CCR2[7:0] 0000,0000 /* 捕获/比较寄存器 2 低 8 位 */
  2070. //sfr PWMB_CCR6L = 0xFEF8H; CCR6[7:0] 0000,0000 /* 捕获/比较寄存器 2 低 8 位 */
  2071. #define PWMA_Duty2(n) PWMA_CCR2 = n //捕获/比较寄存器 2 设置
  2072. #define PWMB_Duty6(n) PWMB_CCR6 = n //捕获/比较寄存器 2 设置
  2073. // 7 6 5 4 3 2 1 0 Reset Value
  2074. //sfr PWMA_CCR3H = 0xFED9H; CCR3[15:8] 0000,0000 /* 捕获/比较寄存器 3 高 8 位 */
  2075. //sfr PWMB_CCR7H = 0xFEF9H; CCR7[15:8] 0000,0000 /* 捕获/比较寄存器 3 高 8 位 */
  2076. //sfr PWMA_CCR3L = 0xFEDAH; CCR3[7:0] 0000,0000 /* 捕获/比较寄存器 3 低 8 位 */
  2077. //sfr PWMB_CCR7L = 0xFEFAH; CCR7[7:0] 0000,0000 /* 捕获/比较寄存器 3 低 8 位 */
  2078. #define PWMA_Duty3(n) PWMA_CCR3 = n //捕获/比较寄存器 3 设置
  2079. #define PWMB_Duty7(n) PWMB_CCR7 = n //捕获/比较寄存器 3 设置
  2080. // 7 6 5 4 3 2 1 0 Reset Value
  2081. //sfr PWMA_CCR4H = 0xFEDBH; CCR4[15:8] 0000,0000 /* 捕获/比较寄存器 4 高 8 位 */
  2082. //sfr PWMB_CCR8H = 0xFEFBH; CCR8[15:8] 0000,0000 /* 捕获/比较寄存器 4 高 8 位 */
  2083. //sfr PWMA_CCR4L = 0xFEDCH; CCR4[7:0] 0000,0000 /* 捕获/比较寄存器 4 低 8 位 */
  2084. //sfr PWMB_CCR8L = 0xFEFCH; CCR8[7:0] 0000,0000 /* 捕获/比较寄存器 4 低 8 位 */
  2085. #define PWMA_Duty4(n) PWMA_CCR4 = n //捕获/比较寄存器 4 设置
  2086. #define PWMB_Duty8(n) PWMB_CCR8 = n //捕获/比较寄存器 4 设置
  2087. // 7 6 5 4 3 2 1 0 Reset Value
  2088. //sfr PWMA_BRK = 0xFEDDH; MOE1 AOE1 BKP1 BKE1 OSSR1 OSSI1 LOCK11 LOCK10 0000,0000 /* 刹车寄存器 */
  2089. //sfr PWMB_BRK = 0xFEFDH; MOE2 AOE2 BKP2 BKE2 OSSR2 OSSI2 LOCK21 LOCK20 0000,0000 /* 刹车寄存器 */
  2090. #define PWMA_BrakeOutputEnable() PWMA_BRK |= 0x80 //1:主输出使能
  2091. #define PWMA_BrakeOutputDisable() PWMA_BRK &= ~0x80 //0:主输出禁止
  2092. #define PWMB_BrakeOutputEnable() PWMB_BRK |= 0x80 //1:主输出使能
  2093. #define PWMB_BrakeOutputDisable() PWMB_BRK &= ~0x80 //0:主输出禁止
  2094. #define PWMA_BrakeAutoOutputEnable() PWMA_BRK |= 0x40 //1:自动输出使能
  2095. #define PWMA_BrakeAutoOutputDisable() PWMA_BRK &= ~0x40 //0:自动输出禁止
  2096. #define PWMB_BrakeAutoOutputEnable() PWMB_BRK |= 0x40 //1:自动输出使能
  2097. #define PWMB_BrakeAutoOutputDisable() PWMB_BRK &= ~0x40 //0:自动输出禁止
  2098. #define PWMA_BrakeHighValid() PWMA_BRK |= 0x20 //1:刹车输入高电平有效
  2099. #define PWMA_BrakeLowValid() PWMA_BRK &= ~0x20 //0:刹车输入低电平有效
  2100. #define PWMB_BrakeHighValid() PWMB_BRK |= 0x20 //1:刹车输入高电平有效
  2101. #define PWMB_BrakeLowValid() PWMB_BRK &= ~0x20 //0:刹车输入低电平有效
  2102. #define PWMA_BrakeEnable() PWMA_BRK |= 0x10 //1:开启刹车输入
  2103. #define PWMA_BrakeDisable() PWMA_BRK &= ~0x10 //0:禁止刹车输入
  2104. #define PWMB_BrakeEnable() PWMB_BRK |= 0x10 //1:开启刹车输入
  2105. #define PWMB_BrakeDisable() PWMB_BRK &= ~0x10 //0:禁止刹车输入
  2106. //运行模式下“关闭状态”选择
  2107. #define PWMA_OSSRnEnable() PWMA_BRK |= 0x08 //1:当 PWM 不工作时,一旦 CCiE=1 或 CCiNE=1,首先开启 OC/OCN 并输出无效电平,然后置OC/OCN 使能输出信号=1
  2108. #define PWMA_OSSRnDisable() PWMA_BRK &= ~0x08 //0:当 PWM 不工作时,禁止 OC/OCN 输出(OC/OCN 使能输出信号=0)
  2109. #define PWMB_OSSRnEnable() PWMB_BRK |= 0x08 //1:当 PWM 不工作时,一旦 CCiE=1 或 CCiNE=1,首先开启 OC/OCN 并输出无效电平,然后置OC/OCN 使能输出信号=1
  2110. #define PWMB_OSSRnDisable() PWMB_BRK &= ~0x08 //0:当 PWM 不工作时,禁止 OC/OCN 输出(OC/OCN 使能输出信号=0)
  2111. //空闲模式下“关闭状态”选择
  2112. #define PWMA_OSSInEnable() PWMA_BRK |= 0x04 //1:当 PWM 不工作时,一旦 CCiE=1 或 CCiNE=1,OC/OCN 首先输出其空闲电平,然后 OC/OCN使能输出信号=1
  2113. #define PWMA_OSSInDisable() PWMA_BRK &= ~0x04 //0:当 PWM 不工作时,禁止 OC/OCN 输出(OC/OCN 使能输出信号=0)
  2114. #define PWMB_OSSInEnable() PWMB_BRK |= 0x04 //1:当 PWM 不工作时,一旦 CCiE=1 或 CCiNE=1,OC/OCN 首先输出其空闲电平,然后 OC/OCN使能输出信号=1
  2115. #define PWMB_OSSInDisable() PWMB_BRK &= ~0x04 //0:当 PWM 不工作时,禁止 OC/OCN 输出(OC/OCN 使能输出信号=0)
  2116. #define PWMn_lock_L0 0 //寄存器无写保护
  2117. #define PWMn_lock_L1 1 //锁定级别 1:不能写入 PWMn_BKR 寄存器的 BKE、BKP、AOE 位和PWMn_OISR 寄存器的 OISI 位
  2118. #define PWMn_lock_L2 2 //锁定级别 2:不能写入锁定级别 1 中的各位,也不能写入 CC 极性位以及 OSSR/OSSI 位
  2119. #define PWMn_lock_L3 3 //锁定级别 3:不能写入锁定级别 2 中的各位,也不能写入 CC 控制位
  2120. #define PWMA_LockLevelSet(n) PWMA_BRK = (PWMA_BRK & ~0x03) | (n&3) //锁定设置。该位为防止软件错误而提供的写保护措施
  2121. #define PWMB_LockLevelSet(n) PWMB_BRK = (PWMB_BRK & ~0x03) | (n&3) //锁定设置。该位为防止软件错误而提供的写保护措施
  2122. // 7 6 5 4 3 2 1 0 Reset Value
  2123. //sfr PWMA_DTR = 0xFEDEH; DTG1[7:0] 0000,0000 /* 死区寄存器 */
  2124. //sfr PWMB_DTR = 0xFEFEH; DTG2[7:0] 0000,0000 /* 死区寄存器 */
  2125. //DTGn[7:5] = 000~011: 死区时间 = DTGn[7:0] * tCK_PSC
  2126. //DTGn[7:5] = 100~101: 死区时间 = (64 + DTGn[6:0]) * 2 * tCK_PSC
  2127. //DTGn[7:5] = 110: 死区时间 = (32 + DTGn[5:0]) * 8 * tCK_PSC
  2128. //DTGn[7:5] = 111: 死区时间 = (32 + DTGn[4:0]) * 16 * tCK_PSC
  2129. #define PWMA_DeadTime(n) PWMA_DTR = n //死区发生器设置
  2130. #define PWMB_DeadTime(n) PWMB_DTR = n //死区发生器设置
  2131. // 7 6 5 4 3 2 1 0 Reset Value
  2132. //sfr PWMA_OISR = 0xFEDFH; OIS4N OIS4 OIS3N OIS3 OIS2N OIS2 OIS1N OIS1 0000,0000 /* 输出空闲状态寄存器 */
  2133. //sfr PWMB_OISR = 0xFEFFH; - OIS8 - OIS7 - OIS6 - OIS5 x0x0,x0x0 /* 输出空闲状态寄存器 */
  2134. #define PWMA_OC1_OUT_0() PWMA_OISR &= ~0x01 /* 当 MOE=0 时,如果 OC1N 使能,则在一个死区后,OC1=0 */
  2135. #define PWMA_OC1_OUT_1() PWMA_OISR |= 0x01 /* 当 MOE=0 时,如果 OC1N 使能,则在一个死区后,OC1=1 */
  2136. #define PWMA_OC1N_OUT_0() PWMA_OISR &= ~0x02 /* 当 MOE=0 时,则在一个死区后,OC1N=0 */
  2137. #define PWMA_OC1N_OUT_1() PWMA_OISR |= 0x02 /* 当 MOE=0 时,则在一个死区后,OC1N=1 */
  2138. #define PWMA_OC2_OUT_0() PWMA_OISR &= ~0x04 /* 当 MOE=0 时,如果 OC2N 使能,则在一个死区后,OC2=0 */
  2139. #define PWMA_OC2_OUT_1() PWMA_OISR |= 0x04 /* 当 MOE=0 时,如果 OC2N 使能,则在一个死区后,OC2=1 */
  2140. #define PWMA_OC2N_OUT_0() PWMA_OISR &= ~0x08 /* 当 MOE=0 时,则在一个死区后,OC2N=0 */
  2141. #define PWMA_OC2N_OUT_1() PWMA_OISR |= 0x08 /* 当 MOE=0 时,则在一个死区后,OC2N=1 */
  2142. #define PWMA_OC3_OUT_0() PWMA_OISR &= ~0x10 /* 当 MOE=0 时,如果 OC3N 使能,则在一个死区后,OC3=0 */
  2143. #define PWMA_OC3_OUT_1() PWMA_OISR |= 0x10 /* 当 MOE=0 时,如果 OC3N 使能,则在一个死区后,OC3=1 */
  2144. #define PWMA_OC3N_OUT_0() PWMA_OISR &= ~0x20 /* 当 MOE=0 时,则在一个死区后,OC3N=0 */
  2145. #define PWMA_OC3N_OUT_1() PWMA_OISR |= 0x20 /* 当 MOE=0 时,则在一个死区后,OC3N=1 */
  2146. #define PWMA_OC4_OUT_0() PWMA_OISR &= ~0x40 /* 当 MOE=0 时,如果 OC4N 使能,则在一个死区后,OC4=0 */
  2147. #define PWMA_OC4_OUT_1() PWMA_OISR |= 0x40 /* 当 MOE=0 时,如果 OC4N 使能,则在一个死区后,OC4=1 */
  2148. #define PWMA_OC4N_OUT_0() PWMA_OISR &= ~0x80 /* 当 MOE=0 时,则在一个死区后,OC4N=0 */
  2149. #define PWMA_OC4N_OUT_1() PWMA_OISR |= 0x80 /* 当 MOE=0 时,则在一个死区后,OC4N=1 */
  2150. #define PWMB_OC5_OUT_0() PWMB_OISR &= ~0x01 /* 当 MOE=0 时,则在一个死区后,OC5=0 */
  2151. #define PWMB_OC5_OUT_1() PWMB_OISR |= 0x01 /* 当 MOE=0 时,则在一个死区后,OC5=1 */
  2152. #define PWMB_OC6_OUT_0() PWMB_OISR &= ~0x04 /* 当 MOE=0 时,则在一个死区后,OC6=0 */
  2153. #define PWMB_OC6_OUT_1() PWMB_OISR |= 0x04 /* 当 MOE=0 时,则在一个死区后,OC6=1 */
  2154. #define PWMB_OC7_OUT_0() PWMB_OISR &= ~0x10 /* 当 MOE=0 时,则在一个死区后,OC7=0 */
  2155. #define PWMB_OC7_OUT_1() PWMB_OISR |= 0x10 /* 当 MOE=0 时,则在一个死区后,OC7=1 */
  2156. #define PWMB_OC8_OUT_0() PWMB_OISR &= ~0x40 /* 当 MOE=0 时,则在一个死区后,OC8=0 */
  2157. #define PWMB_OC8_OUT_1() PWMB_OISR |= 0x40 /* 当 MOE=0 时,则在一个死区后,OC8=1 */
  2158. /*
  2159. ;PCA_PWMn: 7 6 5 4 3 2 1 0
  2160. ; EBSn_1 EBSn_0 - - - - EPCnH EPCnL
  2161. ;B5-B2: 保留
  2162. ;B1(EPCnH): 在PWM模式下,与CCAPnH组成9位数。
  2163. ;B0(EPCnL): 在PWM模式下,与CCAPnL组成9位数。
  2164. */
  2165. #define PWM0_NORMAL() PCA_PWM0 &= ~3 /* PWM0正常输出(默认) */
  2166. #define PWM0_OUT_0() PCA_PWM0 |= 3, CCAP0H = 0xff /* PWM0一直输出0 */
  2167. #define PWM0_OUT_1() PCA_PWM0 &= 0xc0, CCAP0H = 0 /* PWM0一直输出1 */
  2168. #define PWM1_NORMAL() PCA_PWM1 &= ~3 /* PWM1正常输出(默认) */
  2169. #define PWM1_OUT_0() PCA_PWM1 |= 3, CCAP1H = 0xff /* PWM1一直输出0 */
  2170. #define PWM1_OUT_1() PCA_PWM1 &= 0xc0, CCAP1H = 0 /* PWM1一直输出1 */
  2171. #define PWM2_NORMAL() PCA_PWM2 &= ~3 /* PWM2正常输出(默认) */
  2172. #define PWM2_OUT_0() PCA_PWM2 |= 3, CCAP2H = 0xff /* PWM2一直输出0 */
  2173. #define PWM2_OUT_1() PCA_PWM2 &= 0xc0, CCAP2H = 0 /* PWM2一直输出1 */
  2174. //#define PWM3_NORMAL() PCA_PWM3 &= ~3 /* PWM3正常输出(默认) */
  2175. //#define PWM3_OUT_0() PCA_PWM3 |= 3, CCAP3H = 0xff /* PWM3一直输出0 */
  2176. //#define PWM3_OUT_1() PCA_PWM3 &= 0xc0, CCAP3H = 0 /* PWM3一直输出1 */
  2177. // 7 6 5 4 3 2 1 0 Reset Value
  2178. //sfr CCON = 0xD8; CF CR - - CCF3 CCF2 CCF1 CCF0 00xx,xx00 //PCA 控制寄存器。
  2179. sbit CCF0 = CCON^0; /* PCA 模块0中断标志,由硬件置位,必须由软件清0。 */
  2180. sbit CCF1 = CCON^1; /* PCA 模块1中断标志,由硬件置位,必须由软件清0。 */
  2181. sbit CCF2 = CCON^2; /* PCA 模块2中断标志,由硬件置位,必须由软件清0。 */
  2182. //sbit CCF3 = CCON^3; /* PCA 模块3中断标志,由硬件置位,必须由软件清0。 */
  2183. sbit CR = CCON^6; /* 1: 允许PCA计数器计数,必须由软件清0。*/
  2184. sbit CF = CCON^7; /* PCA计数器溢出(CH,CL由FFFFH变为0000H)标志。PCA计数器溢出后由硬件置位,必须由软件清0。*/
  2185. // 7 6 5 4 3 2 1 0 Reset Value
  2186. //sfr CMOD = 0xD9; CIDL - - - CPS2 CPS1 CPS0 ECF 0xxx,0000 //PCA 工作模式寄存器。
  2187. #define PCA_IDLE_OFF() CMOD |= (1<<7) /* IDLE状态PCA停止计数。 */
  2188. #define PCA_IDLE_ON() CMOD &= ~(1<<7) /* IDLE状态PCA继续计数。 */
  2189. #define PCA_CLK_12T() CMOD &= ~0x0E /* PCA计数脉冲选择 fosc/12 */
  2190. #define PCA_CLK_2T() CMOD = (CMOD & ~0x0E) + 2 /* PCA计数脉冲选择 fosc/2 */
  2191. #define PCA_CLK_T0() CMOD = (CMOD & ~0x0E) + 4 /* PCA计数脉冲选择Timer0中断,Timer0可通过AUXR寄存器设置成工作在12T或1T模式。 */
  2192. #define PCA_CLK_ECI() CMOD = (CMOD & ~0x0E) + 6 /* PCA计数脉冲选择从ECI/P3.4脚输入的外部时钟,最大 fosc/2。 */
  2193. #define PCA_CLK_1T() CMOD = (CMOD & ~0x0E) + 8 /* PCA计数脉冲选择 Fosc */
  2194. #define PCA_CLK_4T() CMOD = (CMOD & ~0x0E) + 10 /* PCA计数脉冲选择 Fosc/4 */
  2195. #define PCA_CLK_6T() CMOD = (CMOD & ~0x0E) + 12 /* PCA计数脉冲选择 Fosc/6 */
  2196. #define PCA_CLK_8T() CMOD = (CMOD & ~0x0E) + 14 /* PCA计数脉冲选择 Fosc/8 */
  2197. #define PCA_INT_ENABLE() CMOD |= 1 /* PCA计数器溢出中断允许位,1---允许CF(CCON.7)产生中断。 */
  2198. #define PCA_INT_DISABLE() CMOD &= ~1 /* PCA计数器溢出中断禁止。 */
  2199. // 7 6 5 4 3 2 1 0 Reset Value
  2200. //sfr P_SW1 = 0xA2; S1_S1 S1_S0 CCP_S1 CCP_S0 SPI_S1 SPI_S0 0 - nn00,000x //Auxiliary Register 1
  2201. #define PCA_USE_P12P11P10P37() P_SW1 &= ~0x30 /* 将PCA/PWM切换到P12(ECI) P11(CCP0) P10(CCP1) P37(CCP2)(上电默认) */
  2202. #define PCA_USE_P34P35P36P37() P_SW1 = (P_SW1 & ~0x30) | 0x10 /* 将PCA/PWM切换到P34(ECI) P35(CCP0) P36(CCP1) P37(CCP2) */
  2203. #define PCA_USE_P24P25P26P27() P_SW1 = (P_SW1 & ~0x30) | 0x20 /* 将PCA/PWM切换到P24(ECI) P25(CCP0) P26(CCP1) P27(CCP2) */
  2204. /* 7 6 5 4 3 2 1 0 Reset Value
  2205. //sfr CCAPM0 = 0xDA; PWM 寄存器 - ECOM0 CCAPP0 CCAPN0 MAT0 TOG0 PWM0 ECCF0 x000,0000 //PCA 模块0
  2206. //sfr CCAPM1 = 0xDB; PWM 寄存器 - ECOM1 CCAPP1 CCAPN1 MAT1 TOG1 PWM1 ECCF1 x000,0000 //PCA 模块1
  2207. //sfr CCAPM2 = 0xDC; PWM 寄存器 - ECOM2 CCAPP2 CCAPN2 MAT2 TOG2 PWM2 ECCF2 x000,0000 //PCA 模块2
  2208. //sfr CCAPM3 = 0xDD; PWM 寄存器 - ECOM3 CCAPP3 CCAPN3 MAT3 TOG3 PWM3 ECCF3 x000,0000 //PCA 模块3
  2209. ;ECOMn = 1: 允许比较功能。
  2210. ;CAPPn = 1: 允许上升沿触发捕捉功能。
  2211. ;CAPNn = 1: 允许下降沿触发捕捉功能。
  2212. ;MATn = 1: 当匹配情况发生时,允许CCON中的CCFn置位。
  2213. ;TOGn = 1: 当匹配情况发生时,CEXn将翻转。(CEX0/PCA0/PWM0/P3.7,CEX1/PCA1/PWM1/P3.5)
  2214. ;PWMn = 1: 将CEXn设置为PWM输出。
  2215. ;ECCFn = 1: 允许CCON中的CCFn触发中断。
  2216. ;ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn
  2217. ; 0 0 0 0 0 0 0 00H 未启用任何功能。
  2218. ; x 1 0 0 0 0 x 20H 16位CEXn上升沿触发捕捉功能。
  2219. ; x 0 1 0 0 0 x 10H 16位CEXn下降沿触发捕捉功能。
  2220. ; x 1 1 0 0 0 x 30H 16位CEXn/PCAn边沿(上、下沿)触发捕捉功能。
  2221. ; 1 0 0 1 0 0 x 48H 16位软件定时器。
  2222. ; 1 0 0 1 1 0 x 4CH 16位高速脉冲输出。
  2223. ; 1 0 0 0 0 1 0 42H 8位PWM。无中断
  2224. ; 1 1 0 0 0 1 1 63H 8位PWM。低变高可产生中断
  2225. ; 1 0 1 0 0 1 1 53H 8位PWM。高变低可产生中断
  2226. ; 1 1 1 0 0 1 1 73H 8位PWM。低变高或高变低均可产生中断
  2227. ;*******************************************************************
  2228. ;*******************************************************************/
  2229. #define PCA0_none() CCAPM0 = 0
  2230. #define PCA0_PWM(nbit) CCAPM0 = 0x42,PCA_PWM0 = (PCA_PWM0 & 0x3f) | (nbit<<6)
  2231. #define PCA0_PWM_rise_int(nbit) CCAPM0 = 0x63,PCA_PWM0 = (PCA_PWM0 & 0x3f) | (nbit<<6)
  2232. #define PCA0_PWM_fall_int(nbit) CCAPM0 = 0x53,PCA_PWM0 = (PCA_PWM0 & 0x3f) | (nbit<<6)
  2233. #define PCA0_PWM_edge_int(nbit) CCAPM0 = 0x73,PCA_PWM0 = (PCA_PWM0 & 0x3f) | (nbit<<6)
  2234. #define PCA0_capture_rise() CCAPM0 = (0x20 + 1)
  2235. #define PCA0_capture_fall() CCAPM0 = (0x10 + 1)
  2236. #define PCA0_capture_edge() CCAPM0 = (0x30 + 1)
  2237. #define PCA0_16bit_Timer() CCAPM0 = (0x48 + 1)
  2238. #define PCA0_High_PulseEnable() CCAPM0 |= 0x04
  2239. #define PCA1_none() CCAPM1 = 0
  2240. #define PCA1_PWM(nbit) CCAPM1 = 0x42,PCA_PWM1 = (PCA_PWM1 & 0x3f) | (nbit<<6)
  2241. #define PCA1_PWM_rise_int(nbit) CCAPM1 = 0x63,PCA_PWM1 = (PCA_PWM1 & 0x3f) | (nbit<<6)
  2242. #define PCA1_PWM_fall_int(nbit) CCAPM1 = 0x53,PCA_PWM1 = (PCA_PWM1 & 0x3f) | (nbit<<6)
  2243. #define PCA1_PWM_edge_int(nbit) CCAPM1 = 0x73,PCA_PWM1 = (PCA_PWM1 & 0x3f) | (nbit<<6)
  2244. #define PCA1_capture_rise() CCAPM1 = (0x20 + 1)
  2245. #define PCA1_capture_fall() CCAPM1 = (0x10 + 1)
  2246. #define PCA1_capture_edge() CCAPM1 = (0x30 + 1)
  2247. #define PCA1_16bit_Timer() CCAPM1 = (0x48 + 1)
  2248. #define PCA1_High_PulseEnable() CCAPM1 |= 0x04
  2249. #define PCA2_none() CCAPM2 = 0
  2250. #define PCA2_PWM(nbit) CCAPM2 = 0x42,PCA_PWM2 = (PCA_PWM2 & 0x3f) | (nbit<<6)
  2251. #define PCA2_PWM_rise_int(nbit) CCAPM2 = 0x63,PCA_PWM2 = (PCA_PWM2 & 0x3f) | (nbit<<6)
  2252. #define PCA2_PWM_fall_int(nbit) CCAPM2 = 0x53,PCA_PWM2 = (PCA_PWM2 & 0x3f) | (nbit<<6)
  2253. #define PCA2_PWM_edge_int(nbit) CCAPM2 = 0x73,PCA_PWM2 = (PCA_PWM2 & 0x3f) | (nbit<<6)
  2254. #define PCA2_capture_rise() CCAPM2 = (0x20 + 1)
  2255. #define PCA2_capture_fall() CCAPM2 = (0x10 + 1)
  2256. #define PCA2_capture_edge() CCAPM2 = (0x30 + 1)
  2257. #define PCA2_16bit_Timer() CCAPM2 = (0x48 + 1)
  2258. #define PCA2_High_PulseEnable() CCAPM2 |= 0x04
  2259. //#define PCA3_none() CCAPM3 = 0
  2260. //#define PCA3_PWM(nbit) CCAPM3 = 0x42,PCA_PWM3 = (PCA_PWM3 & 0x3f) | (nbit<<6)
  2261. //#define PCA3_PWM_rise_int(nbit) CCAPM3 = 0x63,PCA_PWM3 = (PCA_PWM3 & 0x3f) | (nbit<<6)
  2262. //#define PCA3_PWM_fall_int(nbit) CCAPM3 = 0x53,PCA_PWM3 = (PCA_PWM3 & 0x3f) | (nbit<<6)
  2263. //#define PCA3_PWM_edge_int(nbit) CCAPM3 = 0x73,PCA_PWM3 = (PCA_PWM3 & 0x3f) | (nbit<<6)
  2264. //#define PCA3_capture_rise() CCAPM3 = (0x20 + 1)
  2265. //#define PCA3_capture_fall() CCAPM3 = (0x10 + 1)
  2266. //#define PCA3_capture_edge() CCAPM3 = (0x30 + 1)
  2267. //#define PCA3_16bit_Timer() CCAPM3 = (0x48 + 1)
  2268. //#define PCA3_High_PulseEnable() CCAPM3 |= 0x04
  2269. /**********************************************************/
  2270. typedef unsigned char u8;
  2271. typedef unsigned int u16;
  2272. typedef unsigned long u32;
  2273. /**********************************************************/
  2274. #define NOP1() _nop_()
  2275. #define NOP2() NOP1(),NOP1()
  2276. #define NOP3() NOP2(),NOP1()
  2277. #define NOP4() NOP3(),NOP1()
  2278. #define NOP5() NOP4(),NOP1()
  2279. #define NOP6() NOP5(),NOP1()
  2280. #define NOP7() NOP6(),NOP1()
  2281. #define NOP8() NOP7(),NOP1()
  2282. #define NOP9() NOP8(),NOP1()
  2283. #define NOP10() NOP9(),NOP1()
  2284. #define NOP11() NOP10(),NOP1()
  2285. #define NOP12() NOP11(),NOP1()
  2286. #define NOP13() NOP12(),NOP1()
  2287. #define NOP14() NOP13(),NOP1()
  2288. #define NOP15() NOP14(),NOP1()
  2289. #define NOP16() NOP15(),NOP1()
  2290. #define NOP17() NOP16(),NOP1()
  2291. #define NOP18() NOP17(),NOP1()
  2292. #define NOP19() NOP18(),NOP1()
  2293. #define NOP20() NOP19(),NOP1()
  2294. #define NOP21() NOP20(),NOP1()
  2295. #define NOP22() NOP21(),NOP1()
  2296. #define NOP23() NOP22(),NOP1()
  2297. #define NOP24() NOP23(),NOP1()
  2298. #define NOP25() NOP24(),NOP1()
  2299. #define NOP26() NOP25(),NOP1()
  2300. #define NOP27() NOP26(),NOP1()
  2301. #define NOP28() NOP27(),NOP1()
  2302. #define NOP29() NOP28(),NOP1()
  2303. #define NOP30() NOP29(),NOP1()
  2304. #define NOP31() NOP30(),NOP1()
  2305. #define NOP32() NOP31(),NOP1()
  2306. #define NOP33() NOP32(),NOP1()
  2307. #define NOP34() NOP33(),NOP1()
  2308. #define NOP35() NOP34(),NOP1()
  2309. #define NOP36() NOP35(),NOP1()
  2310. #define NOP37() NOP36(),NOP1()
  2311. #define NOP38() NOP37(),NOP1()
  2312. #define NOP39() NOP38(),NOP1()
  2313. #define NOP40() NOP39(),NOP1()
  2314. #define NOP(N) NOP##N()
  2315. /**********************************************/
  2316. #define Pin0 0x01 //IO引脚 Px.0
  2317. #define Pin1 0x02 //IO引脚 Px.1
  2318. #define Pin2 0x04 //IO引脚 Px.2
  2319. #define Pin3 0x08 //IO引脚 Px.3
  2320. #define Pin4 0x10 //IO引脚 Px.4
  2321. #define Pin5 0x20 //IO引脚 Px.5
  2322. #define Pin6 0x40 //IO引脚 Px.6
  2323. #define Pin7 0x80 //IO引脚 Px.7
  2324. #define PinAll 0xFF //IO所有引脚
  2325. #define P0n_standard(bitn) P0M1 &= ~(bitn), P0M0 &= ~(bitn) /* 00 */
  2326. #define P0n_push_pull(bitn) P0M1 &= ~(bitn), P0M0 |= (bitn) /* 01 */
  2327. #define P0n_pure_input(bitn) P0M1 |= (bitn), P0M0 &= ~(bitn) /* 10 */
  2328. #define P0n_open_drain(bitn) P0M1 |= (bitn), P0M0 |= (bitn) /* 11 */
  2329. #define P1n_standard(bitn) P1M1 &= ~(bitn), P1M0 &= ~(bitn)
  2330. #define P1n_push_pull(bitn) P1M1 &= ~(bitn), P1M0 |= (bitn)
  2331. #define P1n_pure_input(bitn) P1M1 |= (bitn), P1M0 &= ~(bitn)
  2332. #define P1n_open_drain(bitn) P1M1 |= (bitn), P1M0 |= (bitn)
  2333. #define P2n_standard(bitn) P2M1 &= ~(bitn), P2M0 &= ~(bitn)
  2334. #define P2n_push_pull(bitn) P2M1 &= ~(bitn), P2M0 |= (bitn)
  2335. #define P2n_pure_input(bitn) P2M1 |= (bitn), P2M0 &= ~(bitn)
  2336. #define P2n_open_drain(bitn) P2M1 |= (bitn), P2M0 |= (bitn)
  2337. #define P3n_standard(bitn) P3M1 &= ~(bitn), P3M0 &= ~(bitn)
  2338. #define P3n_push_pull(bitn) P3M1 &= ~(bitn), P3M0 |= (bitn)
  2339. #define P3n_pure_input(bitn) P3M1 |= (bitn), P3M0 &= ~(bitn)
  2340. #define P3n_open_drain(bitn) P3M1 |= (bitn), P3M0 |= (bitn)
  2341. #define P4n_standard(bitn) P4M1 &= ~(bitn), P4M0 &= ~(bitn)
  2342. #define P4n_push_pull(bitn) P4M1 &= ~(bitn), P4M0 |= (bitn)
  2343. #define P4n_pure_input(bitn) P4M1 |= (bitn), P4M0 &= ~(bitn)
  2344. #define P4n_open_drain(bitn) P4M1 |= (bitn), P4M0 |= (bitn)
  2345. #define P5n_standard(bitn) P5M1 &= ~(bitn), P5M0 &= ~(bitn)
  2346. #define P5n_push_pull(bitn) P5M1 &= ~(bitn), P5M0 |= (bitn)
  2347. #define P5n_pure_input(bitn) P5M1 |= (bitn), P5M0 &= ~(bitn)
  2348. #define P5n_open_drain(bitn) P5M1 |= (bitn), P5M0 |= (bitn)
  2349. #define P6n_standard(bitn) P6M1 &= ~(bitn), P6M0 &= ~(bitn)
  2350. #define P6n_push_pull(bitn) P6M1 &= ~(bitn), P6M0 |= (bitn)
  2351. #define P6n_pure_input(bitn) P6M1 |= (bitn), P6M0 &= ~(bitn)
  2352. #define P6n_open_drain(bitn) P6M1 |= (bitn), P6M0 |= (bitn)
  2353. #define P7n_standard(bitn) P7M1 &= ~(bitn), P7M0 &= ~(bitn)
  2354. #define P7n_push_pull(bitn) P7M1 &= ~(bitn), P7M0 |= (bitn)
  2355. #define P7n_pure_input(bitn) P7M1 |= (bitn), P7M0 &= ~(bitn)
  2356. #define P7n_open_drain(bitn) P7M1 |= (bitn), P7M0 |= (bitn)
  2357. /****************************************************************/
  2358. //sfr INT_CLKO = 0x8F; //附加的 SFR WAKE_CLKO (地址:0x8F)
  2359. /*
  2360. 7 6 5 4 3 2 1 0 Reset Value
  2361. - EX4 EX3 EX2 - T2CLKO T1CLKO T0CLKO 0000,0000B
  2362. b6 - EX4 : 外中断INT4允许
  2363. b5 - EX3 : 外中断INT3允许
  2364. b4 - EX2 : 外中断INT2允许
  2365. b2 - T1CLKO : 允许 T2 溢出脉冲在P3.0脚输出,Fck1 = 1/2 T1 溢出率
  2366. b1 - T1CLKO : 允许 T1 溢出脉冲在P3.4脚输出,Fck1 = 1/2 T1 溢出率
  2367. b0 - T0CLKO : 允许 T0 溢出脉冲在P3.5脚输出,Fck0 = 1/2 T0 溢出率
  2368. */
  2369. #define LVD_InterruptEnable() ELVD = 1
  2370. #define LVD_InterruptDisable() ELVD = 0
  2371. //sfr WKTCL = 0xAA; //唤醒定时器低字节
  2372. //sfr WKTCH = 0xAB; //唤醒定时器高字节
  2373. // B7 B6 B5 B4 B3 B2 B1 B0 B7 B6 B5 B4 B3 B2 B1 B0
  2374. // WKTEN S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 n * 560us
  2375. #define WakeTimerDisable() WKTCH &= 0x7f /* WKTEN = 0 禁止睡眠唤醒定时器 */
  2376. #define WakeTimerSet(scale) WKTCL = (scale) % 256,WKTCH = (scale) / 256 | 0x80 /* WKTEN = 1 允许睡眠唤醒定时器 */
  2377. //sfr BUS_SPEED = 0xA1; //Stretch register - - - - - - EXRTS1 EXRTSS0 xxxx,xx10
  2378. #define BUS_SPEED_1T() BUS_SPEED = BUS_SPEED & ~3
  2379. #define BUS_SPEED_2T() BUS_SPEED = (BUS_SPEED & ~3) | 1
  2380. #define BUS_SPEED_4T() BUS_SPEED = (BUS_SPEED & ~3) | 2
  2381. #define BUS_SPEED_8T() BUS_SPEED = (BUS_SPEED & ~3) | 3
  2382. #define BUS_RD_WR_P44_P43() BUS_SPEED = BUS_SPEED & 0x3f
  2383. #define BUS_RD_WR_P37_P36() BUS_SPEED = (BUS_SPEED & 0x3f) | 0x40
  2384. #define BUS_RD_WR_P42_P40() BUS_SPEED = (BUS_SPEED & 0x3f) | 0x80
  2385. /* interrupt vector */
  2386. #define INT0_VECTOR 0
  2387. #define TIMER0_VECTOR 1
  2388. #define INT1_VECTOR 2
  2389. #define TIMER1_VECTOR 3
  2390. #define UART1_VECTOR 4
  2391. #define ADC_VECTOR 5
  2392. #define LVD_VECTOR 6
  2393. #define PCA_VECTOR 7
  2394. #define UART2_VECTOR 8
  2395. #define SPI_VECTOR 9
  2396. #define INT2_VECTOR 10
  2397. #define INT3_VECTOR 11
  2398. #define TIMER2_VECTOR 12
  2399. #define INT4_VECTOR 16
  2400. #define UART3_VECTOR 17
  2401. #define UART4_VECTOR 18
  2402. #define TIMER3_VECTOR 19
  2403. #define TIMER4_VECTOR 20
  2404. #define CMP_VECTOR 21
  2405. #define PWM0_VECTOR 22
  2406. #define PWMFD_VECTOR 23
  2407. #define I2C_VECTOR 24
  2408. #define USB_VECTOR 25
  2409. #define PWMA_VECTOR 26
  2410. #define PWMB_VECTOR 27
  2411. #define PWM1_VECTOR 28
  2412. #define PWM2_VECTOR 29
  2413. #define PWM3_VECTOR 30
  2414. #define PWM4_VECTOR 31
  2415. #define PWM5_VECTOR 32
  2416. #define TRUE 1
  2417. #define FALSE 0
  2418. //=============================================================
  2419. //========================================
  2420. #define Priority_0 0 //中断优先级为 0 级(最低级)
  2421. #define Priority_1 1 //中断优先级为 1 级(较低级)
  2422. #define Priority_2 2 //中断优先级为 2 级(较高级)
  2423. #define Priority_3 3 //中断优先级为 3 级(最高级)
  2424. //========================================
  2425. #define ENABLE 1
  2426. #define DISABLE 0
  2427. #endif